[coreboot-gerrit] Patch set updated for coreboot: intel/fsp_rangeley: Switch to MMCONF_SUPPORT_DEFAULT
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Mon Dec 5 05:42:58 CET 2016
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17547
-gerrit
commit 57676de83c7b158e1232c40f42f865b47dec814d
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Tue Nov 29 16:26:14 2016 +0200
intel/fsp_rangeley: Switch to MMCONF_SUPPORT_DEFAULT
Boards with this chipset do not have any reference of
MMCONF_BASE_ADDRESS being written to chipset registers.
Either board support is already broken or FSP takes
care of this early and Kconfig lacks the notice that
this parameter must match with the chosen FSP binary.
CPU bootblock associated with this chipset uses
exclusive PCI IO access already.
Untested.
Change-Id: I07d20d81266ff6aaa6384d20a806d52fd4568e08
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/northbridge/intel/fsp_rangeley/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/northbridge/intel/fsp_rangeley/Kconfig b/src/northbridge/intel/fsp_rangeley/Kconfig
index 6a9dbe9..506a913 100644
--- a/src/northbridge/intel/fsp_rangeley/Kconfig
+++ b/src/northbridge/intel/fsp_rangeley/Kconfig
@@ -17,7 +17,7 @@
config NORTHBRIDGE_INTEL_FSP_RANGELEY
bool
select CPU_INTEL_FSP_MODEL_406DX
- select MMCONF_SUPPORT
+ select MMCONF_SUPPORT_DEFAULT
if NORTHBRIDGE_INTEL_FSP_RANGELEY
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