[coreboot-gerrit] Patch set updated for coreboot: PCI ops: Rename pcie_xx() to pci_mmio_xx()

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17530

-gerrit

commit 5c11b1b1cc96b321d777ed8e9f69d2137f3b7f5d
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Sun Oct 27 14:59:00 2013 +0200

    PCI ops: Rename pcie_xx() to pci_mmio_xx()
    
    Change-Id: I7fa65197b8165b9b0b74937f9ba455c48308da37
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/arch/x86/include/arch/io.h           | 54 ++++++++++++++++++++++++++++++++
 src/arch/x86/include/arch/pci_io_cfg.h   | 10 ------
 src/arch/x86/include/arch/pci_mmio_cfg.h | 32 ++++---------------
 3 files changed, 60 insertions(+), 36 deletions(-)

diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 0d1cadf..1ab6996 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -246,6 +246,60 @@ typedef u32 device_t;
 #include <arch/pci_io_cfg.h>
 #include <arch/pci_mmio_cfg.h>
 
+static inline __attribute__((always_inline))
+uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where)
+{
+	if (IS_ENABLED(CONFIG_MMCONF_SUPPORT_DEFAULT))
+		return pci_mmio_read_config8(dev, where);
+	else
+		return pci_io_read_config8(dev, where);
+}
+
+static inline __attribute__((always_inline))
+uint16_t pci_read_config16(pci_devfn_t dev, unsigned int where)
+{
+	if (IS_ENABLED(CONFIG_MMCONF_SUPPORT_DEFAULT))
+		return pci_mmio_read_config16(dev, where);
+	else
+		return pci_io_read_config16(dev, where);
+}
+
+static inline __attribute__((always_inline))
+uint32_t pci_read_config32(pci_devfn_t dev, unsigned int where)
+{
+	if (IS_ENABLED(CONFIG_MMCONF_SUPPORT_DEFAULT))
+		return pci_mmio_read_config32(dev, where);
+	else
+		return pci_io_read_config32(dev, where);
+}
+
+static inline __attribute__((always_inline))
+void pci_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value)
+{
+	if (IS_ENABLED(CONFIG_MMCONF_SUPPORT_DEFAULT))
+		pci_mmio_write_config8(dev, where, value);
+	else
+		pci_io_write_config8(dev, where, value);
+}
+
+static inline __attribute__((always_inline))
+void pci_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value)
+{
+	if (IS_ENABLED(CONFIG_MMCONF_SUPPORT_DEFAULT))
+		pci_mmio_write_config16(dev, where, value);
+	else
+		pci_io_write_config16(dev, where, value);
+}
+
+static inline __attribute__((always_inline))
+void pci_write_config32(pci_devfn_t dev, unsigned where, uint32_t value)
+{
+	if (IS_ENABLED(CONFIG_MMCONF_SUPPORT_DEFAULT))
+		pci_mmio_write_config32(dev, where, value);
+	else
+		pci_io_write_config32(dev, where, value);
+}
+
 #define PCI_DEV_INVALID (0xffffffffU)
 static inline pci_devfn_t pci_io_locate_device(unsigned pci_id, pci_devfn_t dev)
 {
diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h
index b838535..4346285 100644
--- a/src/arch/x86/include/arch/pci_io_cfg.h
+++ b/src/arch/x86/include/arch/pci_io_cfg.h
@@ -94,14 +94,4 @@ void pci_io_write_config32(pci_devfn_t dev, unsigned where, uint32_t value)
 	outl(value, 0xCFC);
 }
 
-#if !CONFIG_MMCONF_SUPPORT_DEFAULT
-#define pci_read_config8 	pci_io_read_config8
-#define pci_read_config16	pci_io_read_config16
-#define pci_read_config32	pci_io_read_config32
-
-#define pci_write_config8 	pci_io_write_config8
-#define pci_write_config16	pci_io_write_config16
-#define pci_write_config32	pci_io_write_config32
-#endif
-
 #endif /* _PCI_IO_CFG_H */
diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/arch/x86/include/arch/pci_mmio_cfg.h
index d3eff8f..9b9f702 100644
--- a/src/arch/x86/include/arch/pci_mmio_cfg.h
+++ b/src/arch/x86/include/arch/pci_mmio_cfg.h
@@ -18,11 +18,10 @@
 
 #include <arch/io.h>
 
-#if CONFIG_MMCONF_SUPPORT
 #define DEFAULT_PCIEXBAR	CONFIG_MMCONF_BASE_ADDRESS
 
 static inline __attribute__ ((always_inline))
-u8 pcie_read_config8(pci_devfn_t dev, unsigned int where)
+u8 pci_mmio_read_config8(pci_devfn_t dev, unsigned int where)
 {
 	void *addr;
 	addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | where);
@@ -30,7 +29,7 @@ u8 pcie_read_config8(pci_devfn_t dev, unsigned int where)
 }
 
 static inline __attribute__ ((always_inline))
-u16 pcie_read_config16(pci_devfn_t dev, unsigned int where)
+u16 pci_mmio_read_config16(pci_devfn_t dev, unsigned int where)
 {
 	void *addr;
 	addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~1));
@@ -38,7 +37,7 @@ u16 pcie_read_config16(pci_devfn_t dev, unsigned int where)
 }
 
 static inline __attribute__ ((always_inline))
-u32 pcie_read_config32(pci_devfn_t dev, unsigned int where)
+u32 pci_mmio_read_config32(pci_devfn_t dev, unsigned int where)
 {
 	void *addr;
 	addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~3));
@@ -46,7 +45,7 @@ u32 pcie_read_config32(pci_devfn_t dev, unsigned int where)
 }
 
 static inline __attribute__ ((always_inline))
-void pcie_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
+void pci_mmio_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
 {
 	void *addr;
 	addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | where);
@@ -54,7 +53,7 @@ void pcie_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
 }
 
 static inline __attribute__ ((always_inline))
-void pcie_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
+void pci_mmio_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
 {
 	void *addr;
 	addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~1));
@@ -62,30 +61,11 @@ void pcie_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
 }
 
 static inline __attribute__ ((always_inline))
-void pcie_write_config32(pci_devfn_t dev, unsigned int where, u32 value)
+void pci_mmio_write_config32(pci_devfn_t dev, unsigned int where, u32 value)
 {
 	void *addr;
 	addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~3));
 	write32(addr, value);
 }
 
-#define pci_mmio_read_config8 	pcie_read_config8
-#define pci_mmio_read_config16	pcie_read_config16
-#define pci_mmio_read_config32	pcie_read_config32
-
-#define pci_mmio_write_config8 	pcie_write_config8
-#define pci_mmio_write_config16	pcie_write_config16
-#define pci_mmio_write_config32	pcie_write_config32
-
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
-#define pci_read_config8 	pcie_read_config8
-#define pci_read_config16	pcie_read_config16
-#define pci_read_config32	pcie_read_config32
-
-#define pci_write_config8 	pcie_write_config8
-#define pci_write_config16	pcie_write_config16
-#define pci_write_config32	pcie_write_config32
-#endif
-
-#endif /* CONFIG_MMCONF_SUPPORT */
 #endif /* _PCI_MMIO_CFG_H */