[coreboot-gerrit] New patch to review for coreboot: CPU: Declare cpu_phys_address_size() for all arch

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Tue Dec 6 15:46:51 CET 2016


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17733

-gerrit

commit 71aa3544ed8ef5cd4c9a81675fef82548a06f172
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Tue Dec 6 14:00:05 2016 +0200

    CPU: Declare cpu_phys_address_size() for all arch
    
    Resource allocator and 64-bit PCI BARs will need it and
    PCI use is not really restricted to x86.
    
    Change-Id: Ie97f0f73380118f43ec6271aed5617d62a4f5532
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/arch/x86/include/arch/cpu.h              | 1 -
 src/arch/x86/postcar_loader.c                | 1 +
 src/cpu/intel/haswell/romstage.c             | 1 +
 src/include/cpu/cpu.h                        | 1 +
 src/northbridge/intel/sandybridge/ram_calc.c | 1 +
 src/soc/intel/common/util.c                  | 1 +
 6 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 578bb07..a923d8e 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -161,7 +161,6 @@ static inline unsigned int cpuid_edx(unsigned int op)
 
 int cpu_cpuid_extended_level(void);
 int cpu_have_cpuid(void);
-int cpu_phys_address_size(void);
 
 void smm_init(void);
 void smm_lock(void);
diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c
index 948e445..23f33d5 100644
--- a/src/arch/x86/postcar_loader.c
+++ b/src/arch/x86/postcar_loader.c
@@ -16,6 +16,7 @@
 #include <arch/cpu.h>
 #include <cbmem.h>
 #include <console/console.h>
+#include <cpu/cpu.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <program_loading.h>
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 7eb115c..c82f3b9 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -18,6 +18,7 @@
 #include <cbfs.h>
 #include <console/console.h>
 #include <arch/cpu.h>
+#include <cpu/cpu.h>
 #include <cpu/x86/bist.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h
index 3256a83..dd89a8c 100644
--- a/src/include/cpu/cpu.h
+++ b/src/include/cpu/cpu.h
@@ -8,6 +8,7 @@ void cpu_initialize(unsigned int cpu_index);
 struct bus;
 void initialize_cpus(struct bus *cpu_bus);
 void asmlinkage secondary_cpu_init(unsigned int cpu_index);
+int cpu_phys_address_size(void);
 
 #define __cpu_driver __attribute__ ((used,__section__(".rodata.cpu_driver")))
 #ifndef __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/sandybridge/ram_calc.c b/src/northbridge/intel/sandybridge/ram_calc.c
index 026531a..0253def 100644
--- a/src/northbridge/intel/sandybridge/ram_calc.c
+++ b/src/northbridge/intel/sandybridge/ram_calc.c
@@ -19,6 +19,7 @@
 #include <arch/cpu.h>
 #include <arch/io.h>
 #include <cbmem.h>
+#include <cpu/cpu.h>
 #include <cpu/intel/romstage.h>
 #include <cpu/x86/mtrr.h>
 #include <program_loading.h>
diff --git a/src/soc/intel/common/util.c b/src/soc/intel/common/util.c
index 2d3a34a..3aadd6b 100644
--- a/src/soc/intel/common/util.c
+++ b/src/soc/intel/common/util.c
@@ -15,6 +15,7 @@
 
 #include <arch/cpu.h>
 #include <console/console.h>
+#include <cpu/cpu.h>
 #include <cpu/x86/mtrr.h>
 #include <soc/intel/common/util.h>
 #include <stddef.h>



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