[coreboot-gerrit] New patch to review for coreboot: intel i945 gm45 x4x: Apply cbmem_top() alignment

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17780

-gerrit

commit bf28bbed1a7bbe6ced03704557887961546725c6
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Fri Jul 22 22:53:19 2016 +0300

    intel i945 gm45 x4x: Apply cbmem_top() alignment
    
    Force modest 4 MiB alignment to help with MTRR assignment.
    
    Change-Id: I49a7d1288bc079da1b8bd52150ddcfcfe2e51179
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/northbridge/intel/gm45/ram_calc.c | 3 ++-
 src/northbridge/intel/i945/ram_calc.c | 3 ++-
 src/northbridge/intel/x4x/ram_calc.c  | 5 +++--
 3 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/src/northbridge/intel/gm45/ram_calc.c b/src/northbridge/intel/gm45/ram_calc.c
index 146bcf2..8ee3347 100644
--- a/src/northbridge/intel/gm45/ram_calc.c
+++ b/src/northbridge/intel/gm45/ram_calc.c
@@ -84,7 +84,8 @@ static uintptr_t smm_region_start(void)
 
 void *cbmem_top(void)
 {
-	return (void *) smm_region_start();
+	uintptr_t top_of_ram = ALIGN_DOWN(smm_region_start(), 4*MiB);
+	return (void *) top_of_ram;
 }
 
 void *setup_stack_and_mtrrs(void)
diff --git a/src/northbridge/intel/i945/ram_calc.c b/src/northbridge/intel/i945/ram_calc.c
index 39ede5f..1debfca 100644
--- a/src/northbridge/intel/i945/ram_calc.c
+++ b/src/northbridge/intel/i945/ram_calc.c
@@ -56,7 +56,8 @@ static uintptr_t smm_region_start(void)
 
 void *cbmem_top(void)
 {
-	return (void *) smm_region_start();
+	uintptr_t top_of_ram = ALIGN_DOWN(smm_region_start(), 4*MiB);
+	return (void *) top_of_ram;
 }
 
 /** Decodes used Graphics Mode Select (GMS) to kilobytes. */
diff --git a/src/northbridge/intel/x4x/ram_calc.c b/src/northbridge/intel/x4x/ram_calc.c
index 09eec47..0dff0ac 100644
--- a/src/northbridge/intel/x4x/ram_calc.c
+++ b/src/northbridge/intel/x4x/ram_calc.c
@@ -91,8 +91,9 @@ u8 decode_pciebar(u32 *const base, u32 *const len)
 
 void *cbmem_top(void)
 {
-	u32 ramtop = pci_read_config32(PCI_DEV(0,0,0), D0F0_TSEG);
-	return (void*)(ramtop);
+	uintptr_t top_of_ram = pci_read_config32(PCI_DEV(0,0,0), D0F0_TSEG);
+	top_of_ram = ALIGN_DOWN(top_of_ram, 4*MiB);
+	return (void *) top_of_ram;
 }
 
 void *setup_stack_and_mtrrs(void)