[coreboot-gerrit] Patch set updated for coreboot: Obsoletes RAMBASE and RAMTOP
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Tue Dec 13 01:22:18 CET 2016
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15250
-gerrit
commit aa759630e728ea3f08aa0a348695ebb81a582413
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Sat Jun 18 07:39:31 2016 +0300
Obsoletes RAMBASE and RAMTOP
There is no fixed region of RAMBASE..RAMTOP where ramstage
gets loaded.
Change-Id: Ie90611274fb011759661d5c46c8e35e5cca6533c
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/Kconfig | 4 ++--
src/arch/x86/Kconfig | 4 ----
src/arch/x86/include/arch/memlayout.h | 4 ----
src/arch/x86/memlayout.ld | 2 +-
src/cpu/intel/haswell/Kconfig | 1 -
src/mainboard/getac/p470/Kconfig | 1 -
src/northbridge/amd/agesa/Kconfig | 4 ----
src/northbridge/amd/pi/Kconfig | 4 ----
src/northbridge/intel/gm45/Kconfig | 1 -
src/northbridge/intel/i945/Kconfig | 1 -
src/northbridge/intel/nehalem/Kconfig | 1 -
src/northbridge/intel/sandybridge/Kconfig | 2 --
src/northbridge/intel/x4x/Kconfig | 1 -
src/soc/intel/apollolake/Kconfig | 1 -
src/soc/intel/baytrail/Kconfig | 1 -
src/soc/intel/broadwell/Kconfig | 1 -
src/soc/intel/quark/Kconfig | 1 -
src/soc/intel/skylake/Kconfig | 1 -
18 files changed, 3 insertions(+), 32 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig
index e3c329c..e01c0d3 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -232,8 +232,8 @@ config RELOCATABLE_MODULES
config RELOCATABLE_RAMSTAGE
depends on EARLY_CBMEM_INIT
- bool "Build the ramstage to be relocatable in 32-bit address space."
- default n
+ bool
+ default y
select RELOCATABLE_MODULES
help
The reloctable ramstage support allows for the ramstage to be built
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index cd5f8e5..f6d6a7b 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -82,10 +82,6 @@ config SIPI_VECTOR_IN_ROM
config RAMBASE
hex
default 0x100000
-
-config RAMTOP
- hex
- default 0x200000
depends on ARCH_X86
# Traditionally BIOS region on SPI flash boot media was memory mapped right below
diff --git a/src/arch/x86/include/arch/memlayout.h b/src/arch/x86/include/arch/memlayout.h
index 83e5b90..2292fec 100644
--- a/src/arch/x86/include/arch/memlayout.h
+++ b/src/arch/x86/include/arch/memlayout.h
@@ -24,8 +24,4 @@
#define ARCH_STAGE_HAS_BSS_SECTION 0
#endif
-#if !defined(CONFIG_RAMTOP) || !CONFIG_RAMTOP
-# error "CONFIG_RAMTOP not configured"
-#endif
-
#endif /* __ARCH_MEMLAYOUT_H */
diff --git a/src/arch/x86/memlayout.ld b/src/arch/x86/memlayout.ld
index e6db0b8..a007272 100644
--- a/src/arch/x86/memlayout.ld
+++ b/src/arch/x86/memlayout.ld
@@ -26,7 +26,7 @@ SECTIONS
* conditionalize with macros.
*/
#if ENV_RAMSTAGE
- RAMSTAGE(CONFIG_RAMBASE, CONFIG_RAMTOP - CONFIG_RAMBASE)
+ RAMSTAGE(CONFIG_RAMBASE, 8M)
#elif ENV_ROMSTAGE
/* The 1M size is not allocated. It's just for basic size checking.
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig
index ec75391..4a33972 100644
--- a/src/cpu/intel/haswell/Kconfig
+++ b/src/cpu/intel/haswell/Kconfig
@@ -19,7 +19,6 @@ config CPU_SPECIFIC_OPTIONS
select TSC_CONSTANT_RATE
select SMM_TSEG
select RELOCATABLE_MODULES
- select RELOCATABLE_RAMSTAGE
select SUPPORT_CPU_UCODE_IN_CBFS
#select AP_IN_SIPI_WAIT
select TSC_SYNC_MFENCE
diff --git a/src/mainboard/getac/p470/Kconfig b/src/mainboard/getac/p470/Kconfig
index ea68bed..cdcd9cc 100644
--- a/src/mainboard/getac/p470/Kconfig
+++ b/src/mainboard/getac/p470/Kconfig
@@ -33,7 +33,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select UDELAY_LAPIC
select BOARD_ROMSIZE_KB_1024
select CHANNEL_XOR_RANDOMIZATION
- select EARLY_CBMEM_INIT
select VGA
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
diff --git a/src/northbridge/amd/agesa/Kconfig b/src/northbridge/amd/agesa/Kconfig
index d5cff80..37bf3c4 100644
--- a/src/northbridge/amd/agesa/Kconfig
+++ b/src/northbridge/amd/agesa/Kconfig
@@ -35,8 +35,4 @@ config HEAP_SIZE
hex
default 0xc0000
-config RAMTOP
- hex
- default 0x400000
-
endif # NORTHBRIDGE_AMD_AGESA
diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
index 122b0e6..1fba05a 100644
--- a/src/northbridge/amd/pi/Kconfig
+++ b/src/northbridge/amd/pi/Kconfig
@@ -41,10 +41,6 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n
-config RAMTOP
- hex
- default 0x1000000
-
config HEAP_SIZE
hex
default 0xc0000
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index 9a370d5..ca1f9c6 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -24,7 +24,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select VGA
select INTEL_EDID
select INTEL_GMA_ACPI
- select RELOCATABLE_RAMSTAGE
config CBFS_SIZE
hex
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index efe192b..8f59be5 100644
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -24,7 +24,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select LAPIC_MONOTONIC_TIMER
select VGA
select INTEL_GMA_ACPI
- select RELOCATABLE_RAMSTAGE
config NORTHBRIDGE_INTEL_SUBTYPE_I945GC
def_bool n
diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig
index 8894558..884660a 100644
--- a/src/northbridge/intel/nehalem/Kconfig
+++ b/src/northbridge/intel/nehalem/Kconfig
@@ -20,7 +20,6 @@ config NORTHBRIDGE_INTEL_NEHALEM
select INTEL_EDID
select TSC_MONOTONIC_TIMER
select INTEL_GMA_ACPI
- select RELOCATABLE_RAMSTAGE
select NORTHBRIDGE_INTEL_COMMON_MRC_CACHE
if NORTHBRIDGE_INTEL_NEHALEM
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index c78b397..b280001 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -20,7 +20,6 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE
select CPU_INTEL_MODEL_206AX
select HAVE_DEBUG_RAM_SETUP
select INTEL_GMA_ACPI
- select RELOCATABLE_RAMSTAGE
config NORTHBRIDGE_INTEL_IVYBRIDGE
bool
@@ -28,7 +27,6 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE
select CPU_INTEL_MODEL_306AX
select HAVE_DEBUG_RAM_SETUP
select INTEL_GMA_ACPI
- select RELOCATABLE_RAMSTAGE
if NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_SANDYBRIDGE
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
index cbbd9de..760c8f8 100644
--- a/src/northbridge/intel/x4x/Kconfig
+++ b/src/northbridge/intel/x4x/Kconfig
@@ -24,7 +24,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select HAVE_DEBUG_RAM_SETUP
select VGA
select INTEL_GMA_ACPI
- select RELOCATABLE_RAMSTAGE
config CBFS_SIZE
hex
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index b37cde6..f76955f 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -44,7 +44,6 @@ config CPU_SPECIFIC_OPTIONS
select POSTCAR_CONSOLE
select POSTCAR_STAGE
select REG_SCRIPT
- select RELOCATABLE_RAMSTAGE # Build fails if this is not selected
select RTC
select SMM_TSEG
select SOC_INTEL_COMMON
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 2d07c99..595bb66 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -20,7 +20,6 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_HARD_RESET
select NO_FIXED_XIP_ROM_SIZE
select RELOCATABLE_MODULES
- select RELOCATABLE_RAMSTAGE
select PARALLEL_MP
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index 75cd831..b636434 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -24,7 +24,6 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_USBDEBUG
select IOAPIC
select RELOCATABLE_MODULES
- select RELOCATABLE_RAMSTAGE
select REG_SCRIPT
select PARALLEL_MP
select PCIEXP_ASPM
diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig
index 33b3cf8..340469e 100644
--- a/src/soc/intel/quark/Kconfig
+++ b/src/soc/intel/quark/Kconfig
@@ -30,7 +30,6 @@ config CPU_SPECIFIC_OPTIONS
select C_ENVIRONMENT_BOOTBLOCK
select HAVE_HARD_RESET
select REG_SCRIPT
- select RELOCATABLE_RAMSTAGE
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_RESET
select SOC_SETS_MSRS
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 24c2e30..9ed5467 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -37,7 +37,6 @@ config CPU_SPECIFIC_OPTIONS
select PCIEXP_L1_SUB_STATE
select REG_SCRIPT
select RELOCATABLE_MODULES
- select RELOCATABLE_RAMSTAGE
select RTC
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
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