[coreboot-gerrit] New patch to review for coreboot: soc/glk: add RTC, HPET, TMR and PIC resources

[Hannah Williams (hannah.williams@intel.com)]

Hannah Williams (hannah.williams at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17823

-gerrit

commit 2e607a9dd5322778f039939f24c8a92c7582bafc
Author: Hannah Williams <hannah.williams at intel.com>
Date:   Tue Nov 8 23:52:42 2016 -0800

    soc/glk: add RTC, HPET, TMR and PIC resources
    
    Change-Id: Id3ca8682b062edba038bc8f079427f1fad91a36f
    Signed-off-by: Hannah Williams <hannah.williams at intel.com>
---
 src/soc/intel/glk/acpi/lpc.asl | 75 +++++++++++++++++++++++++++++++++++++++---
 1 file changed, 71 insertions(+), 4 deletions(-)

diff --git a/src/soc/intel/glk/acpi/lpc.asl b/src/soc/intel/glk/acpi/lpc.asl
index 749daf7..b156c57 100644
--- a/src/soc/intel/glk/acpi/lpc.asl
+++ b/src/soc/intel/glk/acpi/lpc.asl
@@ -17,7 +17,74 @@
 
 /* Intel LPC Bus Device  - 0:1f.0 */
 
-Device (LPCB)
-{
-	Name (_ADR, 0x001f0000)
-}
+	Device (LPCB)
+	{
+		Name (_ADR, 0x001f0000)
+	}
+
+	Device (HPET)
+        {
+                Name (_HID, EISAID("PNP0103"))
+                Name (_CID, 0x010CD041)
+
+                Method (_STA, 0)        /* Device Status */
+                {
+                        Return (0xf)    /* Enable and show device */
+                }
+
+                Name(_CRS, ResourceTemplate()
+                {
+                        Memory32Fixed(ReadOnly, 0xfed00000, 0x400)
+                })
+        }
+
+	Device (RTC)    /* Real Time Clock */
+        {
+                Name (_HID, EISAID("PNP0B00"))
+                Name (_CRS, ResourceTemplate()
+                {
+                        IO (Decode16, 0x70, 0x70, 1, 8)
+/*
+ * Disable as Windows doesn't like it, and systems don't seem to use it.
+ *                      IRQNoFlags() { 8 }
+ */
+                })
+        }
+
+        Device (TIMR)   /* Intel 8254 timer */
+        {
+                Name(_HID, EISAID("PNP0100"))
+                Name(_CRS, ResourceTemplate()
+                {
+                        IO (Decode16, 0x40, 0x40, 0x01, 0x04)
+                        IO (Decode16, 0x50, 0x50, 0x10, 0x04)
+                        IRQNoFlags() {0}
+                })
+        }
+
+
+	Device(PIC)	/* 8259 Interrupt Controller */
+	{
+		Name(_HID,EISAID("PNP0000"))
+		Name(_CRS, ResourceTemplate()
+		{
+			IO (Decode16, 0x20, 0x20, 0x01, 0x02)
+			IO (Decode16, 0x24, 0x24, 0x01, 0x02)
+			IO (Decode16, 0x28, 0x28, 0x01, 0x02)
+			IO (Decode16, 0x2c, 0x2c, 0x01, 0x02)
+			IO (Decode16, 0x30, 0x30, 0x01, 0x02)
+			IO (Decode16, 0x34, 0x34, 0x01, 0x02)
+			IO (Decode16, 0x38, 0x38, 0x01, 0x02)
+			IO (Decode16, 0x3c, 0x3c, 0x01, 0x02)
+			IO (Decode16, 0xa0, 0xa0, 0x01, 0x02)
+			IO (Decode16, 0xa4, 0xa4, 0x01, 0x02)
+			IO (Decode16, 0xa8, 0xa8, 0x01, 0x02)
+			IO (Decode16, 0xac, 0xac, 0x01, 0x02)
+			IO (Decode16, 0xb0, 0xb0, 0x01, 0x02)
+			IO (Decode16, 0xb4, 0xb4, 0x01, 0x02)
+			IO (Decode16, 0xb8, 0xb8, 0x01, 0x02)
+			IO (Decode16, 0xbc, 0xbc, 0x01, 0x02)
+			IO (Decode16, 0x4d0, 0x4d0, 0x01, 0x02)
+			IRQNoFlags () { 2 }
+		})
+	}