[coreboot-gerrit] Patch set updated for coreboot: skylake: Add target offset for throttling action

[Sumeet R Pawnikar (sumeet.r.pawnikar@intel.com)]

Sumeet R Pawnikar (sumeet.r.pawnikar at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17889

-gerrit

commit a207f8832861f8e1667d816cfd9686d40e0e933f
Author: Sumeet Pawnikar <sumeet.r.pawnikar at intel.com>
Date:   Thu Dec 15 19:29:51 2016 +0530

    skylake: Add target offset for throttling action
    
    This patch adds the offset as 10 degree C to adjust the thermal
    throttling action at prochot activation temperature from the
    default temperature target.
    Currently, Target Temperature Tjmax is 100 degree C. After setting
    Target Offset as 10 degree C, Pcode FW will start throttling action
    at 90 degree C [Tjmax-Offset].
    If there is no Target Offset (i.e. default 0) than FW will start
    throttling action at 100 degree C. But, before that device will
    shutdown due to DPTF critical CPU temperature 99 degree C.
    
    BUG=chrome-os-partner:59397
    BRANCH=None.
    TEST=Built for skylake platform and verified the target
    offset value before and after S3.
    
    Change-Id: Iacf64cbc40871bbec3bede65f196bf292e0149a6
    Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar at intel.com>
---
 src/soc/intel/skylake/cpu.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 3ec8d2c..0458a93 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -206,6 +206,8 @@ static void configure_thermal_target(void)
 		wrmsr(MSR_TEMPERATURE_TARGET, msr);
 	}
 	msr = rdmsr(MSR_TEMPERATURE_TARGET);
+	msr.lo &= ~(0xf << 24); /* Bits 27:24 */
+	msr.lo |= 0xa << 24; /* set target offset as 10 degree C */
 	msr.lo &= ~0x7f; /* Bits 6:0 */
 	msr.lo |= 0xe6; /* setting 100ms thermal time window */
 	wrmsr(MSR_TEMPERATURE_TARGET, msr);