[coreboot-gerrit] Patch merged into coreboot/master: google/eve: Enable native mode for UART pins in bootblock

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 710032be191687adc5865e3ec5319e3b24940e03
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Wed Dec 14 16:57:37 2016 -0800

    google/eve: Enable native mode for UART pins in bootblock
    
    Put the UART pins into native mode in bootblock so they are not
    floating when we try to communicate with H1 over I2C.  Without
    a serial console enabled BIOS these pins were not configured
    until ramstage.
    
    BUG=chrome-os-partner:60935
    TEST=Boot Eve board without serial console and H1 TPM enabled
    
    Change-Id: I30f3bf0bacc1bbd776b351a9c09748b0601c39bc
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://review.coreboot.org/17893
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>


See https://review.coreboot.org/17893 for details.

-gerrit