[coreboot-gerrit] Patch set updated for coreboot: intel/skylake: implement vboot_platform_prepare_reboot()

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13579

-gerrit

commit f544cd7907e1be9dcd823b2c2772c1182ec72fe2
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Fri Jan 22 16:56:48 2016 -0600

    intel/skylake: implement vboot_platform_prepare_reboot()
    
    In order to not reboot loop in the face of failed vboot verification
    on resume set the PM1 control register to indicate S5. After the
    subsequent cold reset the PM1 control register will indicate S5
    as it should.
    
    BUG=chrome-os-partner:46049
    BRANCH=glados
    TEST=On chell injected failed vboot verification. Ensured a reboot
         loop doesn't ensue.
    
    Change-Id: Ie5e9e3f6441a217a5e02b4d78aaf21f8249b8a43
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: a63b57d7bc59bcaf5518f7cc4afccd3d5da6df1c
    Original-Change-Id: I5e467854bf065a138bd46e476a7e7088f51454ca
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/323504
    Original-Reviewed-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/soc/intel/skylake/romstage/power_state.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/src/soc/intel/skylake/romstage/power_state.c b/src/soc/intel/skylake/romstage/power_state.c
index cbef09a..1987534 100644
--- a/src/soc/intel/skylake/romstage/power_state.c
+++ b/src/soc/intel/skylake/romstage/power_state.c
@@ -158,3 +158,17 @@ int vboot_platform_is_resuming(void)
 	int typ = (inl(ACPI_BASE_ADDRESS + PM1_CNT) & SLP_TYP) >> SLP_TYP_SHIFT;
 	return typ == SLP_TYP_S3;
 }
+
+/*
+ * The PM1 control is set to S5 when vboot requests a reboot because the power
+ * state code above may not have collected it's data yet. Therefore, set it to
+ * S5 when vboot requests a reboot. That's necessary if vboot fails in the
+ * resume path and requests a reboot. This prevents a reboot loop where the
+ * error is continually hit on the failing vboot resume path.
+ */
+void vboot_platform_prepare_reboot(void)
+{
+	uint16_t port = ACPI_BASE_ADDRESS + PM1_CNT;
+
+	outl((inl(port) & ~(SLP_TYP)) | (SLP_TYP_S5 << SLP_TYP_SHIFT), port);
+}