[coreboot-gerrit] Patch set updated for coreboot: google/glados: perform early init for CAR *stage

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13583

-gerrit

commit 9ab31dff0a170c78a538787044e8d9b10be36311
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Mon Jan 25 17:43:45 2016 -0600

    google/glados: perform early init for CAR *stage
    
    In order to support both separate verstage and a verified boot after
    romstage one needs to ensure the proper GPIO and EC configuration
    been complete. Therefore, move that logic to
    car_mainboard_post_console_init() in car.c file which gets called
    in the early flow of a CAR stage (either verstage or romstage).
    
    BUG=chrome-os-partner:44827
    BRANCH=glados
    TEST=Built glados w/ separate verstage and booted.
    
    Change-Id: I626a500c183d21f94d976e24f09af15a242fba9c
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: b564514a8b93f53a919fcdac3589e30dbac82124
    Original-Change-Id: Icc989ec5700b3f1a144a6b41198b7dd2c2aac6f7
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/324073
    Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/mainboard/google/glados/Makefile.inc |  3 +++
 src/mainboard/google/glados/car.c        | 35 ++++++++++++++++++++++++++++++++
 src/mainboard/google/glados/romstage.c   | 17 ----------------
 3 files changed, 38 insertions(+), 17 deletions(-)

diff --git a/src/mainboard/google/glados/Makefile.inc b/src/mainboard/google/glados/Makefile.inc
index 22e770b..c0ca567 100644
--- a/src/mainboard/google/glados/Makefile.inc
+++ b/src/mainboard/google/glados/Makefile.inc
@@ -16,6 +16,7 @@
 subdirs-y += spd
 
 romstage-y += boardid.c
+romstage-y += car.c
 romstage-y += pei_data.c
 
 verstage-$(CONFIG_CHROMEOS) += chromeos.c
@@ -30,3 +31,5 @@ ramstage-y += pei_data.c
 ramstage-y += ramstage.c
 
 smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
+
+verstage-y += car.c
diff --git a/src/mainboard/google/glados/car.c b/src/mainboard/google/glados/car.c
new file mode 100644
index 0000000..7791b92
--- /dev/null
+++ b/src/mainboard/google/glados/car.c
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <ec/google/chromeec/ec.h>
+#include <fsp/car.h>
+#include <soc/gpio.h>
+#include "gpio.h"
+
+static void early_config_gpio(void)
+{
+	/* This is a hack for FSP because it does things in MemoryInit()
+	 * which it shouldn't be. We have to prepare certain gpios here
+	 * because of the brokenness in FSP. */
+	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
+}
+
+void car_mainboard_post_console_init(void)
+{
+	/* Ensure the EC and PD are in the right mode for recovery */
+	google_chromeec_early_init();
+
+	early_config_gpio();
+}
diff --git a/src/mainboard/google/glados/romstage.c b/src/mainboard/google/glados/romstage.c
index 6aac80f..2612e2d 100644
--- a/src/mainboard/google/glados/romstage.c
+++ b/src/mainboard/google/glados/romstage.c
@@ -15,32 +15,15 @@
  * GNU General Public License for more details.
  */
 
-#include <cbfs.h>
-#include <console/console.h>
 #include <string.h>
 #include <ec/google/chromeec/ec.h>
-#include <soc/gpio.h>
 #include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
 #include <soc/romstage.h>
-#include "gpio.h"
 #include "spd/spd.h"
 
-static void early_config_gpio(void)
-{
-	/* This is a hack for FSP because it does things in MemoryInit()
-	 * which it shouldn't be. We have to prepare certain gpios here
-	 * because of the brokenness in FSP. */
-	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
-}
-
 void mainboard_romstage_entry(struct romstage_params *params)
 {
-	/* Ensure the EC and PD are in the right mode for recovery */
-	google_chromeec_early_init();
-
-	early_config_gpio();
-
 	/* Fill out PEI DATA */
 	mainboard_fill_pei_data(params->pei_data);
 	mainboard_fill_spd_data(params->pei_data);