[coreboot-gerrit] New patch to review for coreboot: FIXUP

[Timothy Pearson (tpearson@raptorengineeringinc.com)]

Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13593

-gerrit

commit 7249c07d5564496da6dfc653a89067fbbdb328b8
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Wed Feb 3 13:13:24 2016 -0600

    FIXUP
    
    Change-Id: I3a54bbb760cee7b53e2ea1d66d909093ffb9647d
---
 src/cpu/amd/family_10h-family_15h/fidvid.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c
index 5bef7d3..9485ff4 100644
--- a/src/cpu/amd/family_10h-family_15h/fidvid.c
+++ b/src/cpu/amd/family_10h-family_15h/fidvid.c
@@ -542,7 +542,7 @@ static void config_acpi_pwr_state_ctrl_regs(device_t dev, uint64_t cpuRev, uint8
 			// if it does, will it be enough to check the current state
 			// or should we configure for what we'll set up later ?
 			dword = pci_read_config32(dev, 0x58);
-			u32 scrubbingCache = dword &
+			uint32_t scrubbingCache = dword &
 						( (0x1F << 16) // DCacheScrub
 						| (0x1F << 8) ); // L2Scrub
 			if (scrubbingCache) {
@@ -553,7 +553,7 @@ static void config_acpi_pwr_state_ctrl_regs(device_t dev, uint64_t cpuRev, uint8
 		} else { // rev C or later
 			// same doubt as cache scrubbing: ok to check current state ?
 			dword = pci_read_config32(dev, 0xdc);
-			u32 cacheFlushOnHalt = dword & (7 << 16);
+			uint32_t cacheFlushOnHalt = dword & (7 << 16);
 			if (!cacheFlushOnHalt) {
 				c1 = 0x80;
 			}