[coreboot-gerrit] Patch set updated for coreboot: Fix butterfly usb map.

[Vladimir Serbinenko (phcoder@gmail.com)]

Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13661

-gerrit

commit cd4f9284d49ece043480c13f231400c78dcf462a
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Wed Feb 10 02:51:48 2016 +0100

    Fix butterfly usb map.
    
    This was copied from mrc structure despite them having fields in different
    order.
    
    Change-Id: If10ffa3316c5fdc538a6fabf2409512bc8c3e676
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 src/mainboard/google/butterfly/romstage.c | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c
index 9a3157d..a5aa793 100644
--- a/src/mainboard/google/butterfly/romstage.c
+++ b/src/mainboard/google/butterfly/romstage.c
@@ -108,21 +108,21 @@ void rcba_config(void)
 }
 
 const struct southbridge_usb_port mainboard_usb_ports[] = {
-	/* enabled   usb oc pin    length */
-	{ 1, 0, 0x0040 }, /* P0: Right USB 3.0 #1 (no OC) */
-	{ 1, 0, 0x0040 }, /* P1: Right USB 3.0 #2 (no OC) */
-	{ 1, 0, 0x0040 }, /* P2: Camera (no OC) */
-	{ 0, 0, 0x0000 }, /* P3: Empty */
-	{ 0, 0, 0x0000 }, /* P4: Empty */
-	{ 0, 0, 0x0000 }, /* P5: Empty */
-	{ 0, 0, 0x0000 }, /* P6: Empty */
-	{ 0, 0, 0x0000 }, /* P7: Empty */
-	{ 0, 4, 0x0000 }, /* P8: Empty */
-	{ 1, 4, 0x0080 }, /* P9: Left USB 1 (no OC) */
-	{ 1, 4, 0x0040 }, /* P10: Mini PCIe - WLAN / BT (no OC) */
-	{ 0, 4, 0x0000 }, /* P11: Empty */
-	{ 0, 4, 0x0000 }, /* P12: Empty */
-	{ 0, 4, 0x0000 }, /* P13: Empty */
+	/* enabled power  usb oc pin  */
+	{ 1, 0, -1 }, /* P0: Right USB 3.0 #1 (no OC) */
+	{ 1, 0, -1 }, /* P1: Right USB 3.0 #2 (no OC) */
+	{ 1, 0, -1 }, /* P2: Camera (no OC) */
+	{ 0, 0, -1 }, /* P3: Empty */
+	{ 0, 0, -1 }, /* P4: Empty */
+	{ 0, 0, -1 }, /* P5: Empty */
+	{ 0, 0, -1 }, /* P6: Empty */
+	{ 0, 0, -1 }, /* P7: Empty */
+	{ 0, 0, -1 }, /* P8: Empty */
+	{ 1, 1, -1 }, /* P9: Left USB 1 (no OC) */
+	{ 1, 0, -1 }, /* P10: Mini PCIe - WLAN / BT (no OC) */
+	{ 0, 0, -1 }, /* P11: Empty */
+	{ 0, 0, -1 }, /* P12: Empty */
+	{ 0, 0, -1 }, /* P13: Empty */
 };
 
 void mainboard_get_spd(spd_raw_data *spd) {