[coreboot-gerrit] New patch to review for coreboot: device/pci_rom: Rename missleading ON_DEVICE_ROM_RUN

[Patrick Rudolph (siro@das-labor.org)]

Patrick Rudolph (siro at das-labor.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13684

-gerrit

commit 347f1b7485bb10513aea7eb5d85df90f7d964ba5
Author: Patrick Rudolph <siro at das-labor.org>
Date:   Thu Feb 11 08:36:50 2016 +0100

    device/pci_rom: Rename missleading ON_DEVICE_ROM_RUN
    
    The Kconfig option ON_DEVICE_ROM_RUN suggest that PCI option roms
    are runned, but in fact it only controls the loading
    of PCI based option roms.
    
    At the moment coreboot only executes Option Roms if they are
    VGA Options Roms and the VGA Option Rom execution flag is enabled.
    Setting ON_DEVICE_ROM_RUN with VGA Option Rom execution disabled
    has no effect.
    
    Clarify that this flag controls the loading behaviour and not the
    execution behaviour.
    
    Change-Id: Ie3e503cb145f9b7ce613755e60ac0f6c00f2bcdb
    Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
 src/device/Kconfig   |  6 +++---
 src/device/pci_rom.c | 10 ++++------
 2 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/src/device/Kconfig b/src/device/Kconfig
index 0113545..70a362f 100644
--- a/src/device/Kconfig
+++ b/src/device/Kconfig
@@ -84,13 +84,13 @@ config ALWAYS_LOAD_OPROM
 	  are needed for the kernel's display driver to know how a piece of
 	  hardware is configured to be used.
 
-config ON_DEVICE_ROM_RUN
-	bool "Run Option ROMs on PCI devices"
+config ON_DEVICE_ROM_LOAD
+	bool "Load Option ROMs on PCI devices"
 	default n if PAYLOAD_SEABIOS
 	default y if !PAYLOAD_SEABIOS
 	depends on PCI
 	help
-	  Execute Option ROMs stored on PCI/PCIe/AGP devices in coreboot.
+	  Load Option ROMs stored on PCI/PCIe/AGP devices in coreboot.
 
 	  If disabled, only Option ROMs stored in CBFS will be executed by
 	  coreboot. If you are concerned about security, you might want to
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
index ad6c7e4..8366fea 100644
--- a/src/device/pci_rom.c
+++ b/src/device/pci_rom.c
@@ -52,6 +52,10 @@ struct rom_header *pci_rom_probe(struct device *dev)
 	if (rom_header) {
 		printk(BIOS_DEBUG, "In CBFS, ROM address for %s = %p\n",
 		       dev_path(dev), rom_header);
+	} else if (!IS_ENABLED(CONFIG_ON_DEVICE_ROM_LOAD)) {
+			printk(BIOS_DEBUG, "PCI Option ROM loading disabled "
+				"for %s\n", dev_path(dev));
+			return NULL;
 	} else {
 		uintptr_t rom_address;
 
@@ -70,15 +74,9 @@ struct rom_header *pci_rom_probe(struct device *dev)
 					   rom_address|PCI_ROM_ADDRESS_ENABLE);
 		}
 
-#if CONFIG_ON_DEVICE_ROM_RUN
 		printk(BIOS_DEBUG, "Option ROM address for %s = %lx\n",
 		       dev_path(dev), (unsigned long)rom_address);
 		rom_header = (struct rom_header *)rom_address;
-#else
-		printk(BIOS_DEBUG, "Option ROM execution disabled "
-			"for %s\n", dev_path(dev));
-		return NULL;
-#endif
 	}
 
 	printk(BIOS_SPEW, "PCI expansion ROM, signature 0x%04x, "