[coreboot-gerrit] Patch set updated for coreboot: soc/intel/apollolake: limit bootblock size to 32KiB

[Aaron Durbin (adurbin@chromium.org)]

Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13692

-gerrit

commit 5c5b6d733a34c79d8c828ebac0c856516e069a65
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Thu Feb 11 14:47:33 2016 -0600

    soc/intel/apollolake: limit bootblock size to 32KiB
    
    The CSE places the bootblock (IBBL in Intel parlance) below 4GiB
    at top of the address space. However, it's size is limited to
    32KiB. For now, just limit all of bootblock to 32KiB.
    
    Change-Id: I8f84138fb81027eae1712b7af3943942c35cf0ea
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/intel/apollolake/Kconfig | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index dcfbad6..bb0cc20 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -75,4 +75,9 @@ config CONSOLE_UART_BASE_ADDRESS
 	hex "MMIO base address for UART"
 	default 0xde000000
 
+# 32KiB bootblock is all that is mapped in by the CSE at top of 4GiB.
+config C_ENV_BOOTBLOCK_SIZE
+	hex
+	default 0x8000
+
 endif