[coreboot-gerrit] Patch set updated for coreboot: northbridge/intel/i82830: Unify UDELAY selection
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Thu Feb 25 23:59:53 CET 2016
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13783
-gerrit
commit 491c1a1d860bbbe15c2063c4e6ba9a3d3bc8ed9e
Author: Stefan Reinauer <stefan.reinauer at coreboot.org>
Date: Wed Feb 24 13:25:42 2016 -0800
northbridge/intel/i82830: Unify UDELAY selection
Instead of manually including udelay_io.c in each romstage,
select UDELAY_IO for all i830 boards in the chipset.
Change-Id: I0a63ddd3c5e43ea65f776385f54eceb6569751ac
Signed-off-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
---
src/mainboard/rca/rm4100/Kconfig | 1 -
src/mainboard/rca/rm4100/romstage.c | 1 -
src/mainboard/thomson/ip1000/Kconfig | 1 -
src/mainboard/thomson/ip1000/romstage.c | 1 -
src/northbridge/intel/i82830/Kconfig | 1 +
5 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/src/mainboard/rca/rm4100/Kconfig b/src/mainboard/rca/rm4100/Kconfig
index a6f216e..81cfc7b 100644
--- a/src/mainboard/rca/rm4100/Kconfig
+++ b/src/mainboard/rca/rm4100/Kconfig
@@ -7,7 +7,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_I82801DX
select SUPERIO_SMSC_SMSCSUPERIO
select HAVE_PIRQ_TABLE
- select UDELAY_TSC
select BOARD_ROMSIZE_KB_1024
config MAINBOARD_DIR
diff --git a/src/mainboard/rca/rm4100/romstage.c b/src/mainboard/rca/rm4100/romstage.c
index bec4be8..296d072 100644
--- a/src/mainboard/rca/rm4100/romstage.c
+++ b/src/mainboard/rca/rm4100/romstage.c
@@ -19,7 +19,6 @@
#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pnp_def.h>
-#include "drivers/pc80/udelay_io.c"
#include <console/console.h>
#include <lib.h>
#include <superio/smsc/smscsuperio/smscsuperio.h>
diff --git a/src/mainboard/thomson/ip1000/Kconfig b/src/mainboard/thomson/ip1000/Kconfig
index f775e2b..1c21ace 100644
--- a/src/mainboard/thomson/ip1000/Kconfig
+++ b/src/mainboard/thomson/ip1000/Kconfig
@@ -7,7 +7,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_I82801DX
select SUPERIO_SMSC_SMSCSUPERIO
select HAVE_PIRQ_TABLE
- select UDELAY_TSC
select BOARD_ROMSIZE_KB_512
select INTEL_INT15
diff --git a/src/mainboard/thomson/ip1000/romstage.c b/src/mainboard/thomson/ip1000/romstage.c
index 2c69791..5bb7718 100644
--- a/src/mainboard/thomson/ip1000/romstage.c
+++ b/src/mainboard/thomson/ip1000/romstage.c
@@ -19,7 +19,6 @@
#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pnp_def.h>
-#include "drivers/pc80/udelay_io.c"
#include <console/console.h>
#include <lib.h>
#include <superio/smsc/smscsuperio/smscsuperio.h>
diff --git a/src/northbridge/intel/i82830/Kconfig b/src/northbridge/intel/i82830/Kconfig
index 25a9e97..344dfed 100644
--- a/src/northbridge/intel/i82830/Kconfig
+++ b/src/northbridge/intel/i82830/Kconfig
@@ -2,6 +2,7 @@ config NORTHBRIDGE_INTEL_I82830
bool
select HAVE_DEBUG_RAM_SETUP
select LATE_CBMEM_INIT
+ select UDELAY_IO
choice
prompt "Onboard graphics"
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