[coreboot-gerrit] New patch to review for coreboot: soc/fsp_baytrail: Add support for FSP v5
Ben Gardner (gardner.ben@gmail.com)
gerrit at coreboot.org
Fri Jan 15 00:16:50 CET 2016
Ben Gardner (gardner.ben at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12973
-gerrit
commit 67adeea723ca5240f126c09917ecb6506e96f631
Author: Ben Gardner <gardner.ben at gmail.com>
Date: Thu Jan 14 17:15:37 2016 -0600
soc/fsp_baytrail: Add support for FSP v5
Baytrail FSP MR 005 adds two new fields:
AutoSelfRefreshEnable
APTaskTimeoutCnt
Add the device tree definitions.
Change-Id: I12e2a8b0b5cbeb6b7289cf91f65b25e73007a8de
Signed-off-by: Ben Gardner <gardner.ben at gmail.com>
---
src/soc/intel/fsp_baytrail/chip.h | 10 ++++++++++
src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c | 2 ++
src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h | 4 +++-
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/fsp_baytrail/chip.h b/src/soc/intel/fsp_baytrail/chip.h
index 8a88d44..d78e1c4 100755
--- a/src/soc/intel/fsp_baytrail/chip.h
+++ b/src/soc/intel/fsp_baytrail/chip.h
@@ -217,6 +217,16 @@ struct soc_intel_fsp_baytrail_config {
#define ENABLE_IGD_DISABLE UPD_DISABLE
#define ENABLE_IGD_ENABLE UPD_ENABLE
+ /* AutoSelfRefreshEnable */
+ uint8_t AutoSelfRefreshEnable;
+ #define AUTOSELFREFRESH_DEFAULT UPD_DEFAULT
+ #define AUTOSELFREFRESH_DISABLE UPD_DISABLE
+ #define AUTOSELFREFRESH_ENABLE UPD_ENABLE
+
+ /* APTaskTimeoutCnt */
+ uint16_t APTaskTimeoutCnt;
+ #define APTASKTIMEOUTCNT_DEFAULT UPD_DEFAULT
+
/* Memory down data */
uint8_t EnableMemoryDown;
#define MEMORY_DOWN_DEFAULT UPD_DEFAULT
diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
index 1327533..107bfad 100755
--- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
+++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
@@ -113,6 +113,8 @@ static void ConfigureDefaultUpdData(FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *U
UPD_DEFAULT_CHECK(PcdEMMC45HS200Enabled);
UPD_DEFAULT_CHECK(PcdEMMC45RetuneTimerValue);
UPD_DEFAULT_CHECK(PcdEnableIgd);
+ UPD_DEFAULT_CHECK(AutoSelfRefreshEnable);
+ UPD_DEFAULT_CHECK(APTaskTimeoutCnt);
if ((config->PcdeMMCBootMode != EMMC_USE_DEFAULT) ||
(config->PcdeMMCBootMode != EMMC_FOLLOWS_DEVICETREE))
diff --git a/src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h
index 76f7ce7..4bdcb79 100755
--- a/src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h
+++ b/src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h
@@ -102,7 +102,9 @@ typedef struct _UPD_DATA_REGION {
UINT8 PcdEMMC45HS200Enabled; /* Offset 0x0052 */
UINT8 PcdEMMC45RetuneTimerValue; /* Offset 0x0053 */
UINT8 PcdEnableIgd; /* Offset 0x0054 */
- UINT8 UnusedUpdSpace1[155]; /* Offset 0x0055 */
+ UINT8 AutoSelfRefreshEnable; /* Offset 0x0055 */
+ UINT16 APTaskTimeoutCnt; /* Offset 0x0056 */
+ UINT8 UnusedUpdSpace1[152]; /* Offset 0x0058 */
MEMORY_DOWN_DATA PcdMemoryParameters; /* Offset 0x00F0 */
UINT16 PcdRegionTerminator; /* Offset 0x0100 */
} UPD_DATA_REGION;
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