[coreboot-gerrit] New patch to review for coreboot: intel/skylake: Add elog event for THERMTRIP
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Fri Jan 15 16:44:15 CET 2016
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12980
-gerrit
commit c8461a16cbd7fc32ada2abdc892ca8d9d7bc4e89
Author: Duncan Laurie <dlaurie at chromium.org>
Date: Thu Dec 10 01:00:54 2015 -0800
intel/skylake: Add elog event for THERMTRIP
The THERMTRIP status bit is in GBLRST_CAUSE instead of
GEN_PMCON like the EDSv1 indicates. Read this status bit
and add an elog event if THERMTRIP has fired.
BUG=chrome-os-partner:48438
BRANCH=none
TEST=tested on chell EVT after thermtrip fired
Change-Id: Icd52b753c7f3ab0d48095279f1255dd2dd08fd59
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: b090c7897a8f99a685f523990235d83fafa063b2
Original-Change-Id: I5a287d7fdae2ba8ae8585cb9a4d4dd873393e1e6
Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/317242
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
src/soc/intel/skylake/elog.c | 5 +++--
src/soc/intel/skylake/include/soc/pm.h | 2 ++
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c
index 4c0d623..bbc4147 100644
--- a/src/soc/intel/skylake/elog.c
+++ b/src/soc/intel/skylake/elog.c
@@ -70,8 +70,9 @@ static void pch_log_wake_source(struct chipset_power_state *ps)
static void pch_log_power_and_resets(struct chipset_power_state *ps)
{
- /* TODO: Thermal Trip Status. There is a thermal device and
- * other status registers. */
+ /* Thermal Trip */
+ if (ps->gblrst_cause[0] & GBLRST_CAUSE0_THERMTRIP)
+ elog_add_event(ELOG_TYPE_THERM_TRIP);
/* PWR_FLR Power Failure */
if (ps->gen_pmcon_b & PWR_FLR)
diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h
index e85f1b2..79861e9 100644
--- a/src/soc/intel/skylake/include/soc/pm.h
+++ b/src/soc/intel/skylake/include/soc/pm.h
@@ -135,6 +135,8 @@
#define SWGPE_EN (1 << 2)
#define HOT_PLUG_EN (1 << 1)
+#define GBLRST_CAUSE0_THERMTRIP (1 << 5)
+
#define MAINBOARD_POWER_OFF 0
#define MAINBOARD_POWER_ON 1
#define MAINBOARD_POWER_KEEP 2
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