[coreboot-gerrit] Patch merged into coreboot/master: intel/skylake: disable heci1 if psf is unlocked
gerrit at coreboot.org
gerrit at coreboot.org
Sun Jan 17 22:54:35 CET 2016
the following patch was just integrated into master:
commit 7846e34c02473a2a000e1fda1e2051475ef3fbf1
Author: Archana Patni <archana.patni at intel.com>
Date: Wed Nov 11 01:29:23 2015 +0530
intel/skylake: disable heci1 if psf is unlocked
This patch adds support for disabling the heci1 device
at the end of boot sequence. Prior to this, FSP would have
sent the end of post message to ME and initiated the d0i3 bit.
This uses the Psf unlock policy and the p2sb device to disable
the heci1 device, then lock the configuration and hide the device.
BRANCH=none
BUG=chrome-os-partner:45618
TEST=build for kunimitsu or glados board. set the hecienabled policy
to 0 and check for heci 1 device status in kernel lspci.
CQ-DEPEND=CL:*238451
Change-Id: I26b145231f8ed0c140af42d378b222e857d9aff6
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: fe184b8baf1bea9bcd0af1841785a4d763af9358
Original-Change-Id: I3b435491aeea0f2ca36b7877e942dc940560e4dd
Original-Signed-off-by: Archana Patni <archana.patni at intel.com>
Original-Signed-off-by: Subramony Sesha <subramony.sesha at intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/311912
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: https://review.coreboot.org/12976
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth at google.com>
See https://review.coreboot.org/12976 for details.
-gerrit
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