[coreboot-gerrit] New patch to review for coreboot: nb/intel/x4x: Tidy up raminit and fix msbpos() function
Damien Zammit (damien@zamaudio.com)
gerrit at coreboot.org
Fri Jan 22 09:52:20 CET 2016
Damien Zammit (damien at zamaudio.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13127
-gerrit
commit c3bc36ca99c34861ce860293a4b93d5a62bae035
Author: Damien Zammit <damien at zamaudio.com>
Date: Fri Jan 22 19:11:44 2016 +1100
nb/intel/x4x: Tidy up raminit and fix msbpos() function
- Fix bug with msbpos, it was not returning the correct result
due to typo in logic, and unsigned value needed to be negative.
- Add reclaim above 4GiB
- Fix to ME related registers near the end of raminit
Change-Id: I04acd0593a457437ee4a42e14b287b2b17a160af
Signed-off-by: Damien Zammit <damien at zamaudio.com>
---
src/northbridge/intel/x4x/raminit_ddr2.c | 43 ++++++++++++++++++++++++++++----
1 file changed, 38 insertions(+), 5 deletions(-)
diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c
index 2b539a8..cbe73f6 100644
--- a/src/northbridge/intel/x4x/raminit_ddr2.c
+++ b/src/northbridge/intel/x4x/raminit_ddr2.c
@@ -47,12 +47,12 @@ static u32 ddr2mhz(u32 speed)
static u8 msbpos(u8 val) //Reverse
{
- u8 i;
+ int i;
for (i = 7; i >= 0; i--) {
- if ((val & (1 << i)) == 0)
+ if ((val & (1 << i)) != 0)
break;
}
- return i;
+ return (u8)i;
}
static void sdram_detect_smallest_params2(struct sysinfo *s)
@@ -1613,7 +1613,9 @@ static void dradrb_ddr2(struct sysinfo *s)
static void mmap_ddr2(struct sysinfo *s)
{
- u32 gfxsize, gttsize, tsegsize, mmiosize, tom, tolud, touud, gfxbase, gttbase, tsegbase;
+ bool reclaim;
+ u32 gfxsize, gttsize, tsegsize, mmiosize, tom, tolud, touud;
+ u32 gfxbase, gttbase, tsegbase, reclaimbase, reclaimlimit;
u16 ggc;
u16 mesize;
u16 ggc2uma[] = { 0, 0, 0, 0, 0, 32, 48, 64, 128, 256, 96, 160, 224, 352 };
@@ -1627,13 +1629,36 @@ static void mmap_ddr2(struct sysinfo *s)
mesize = ME_UMA_SIZE;
tom = s->channel_capacity[0] + s->channel_capacity[1] - mesize;
tolud = MIN(0x1000 - mmiosize, tom);
+
+ reclaim = false;
+ if ((tom - tolud) > 0x40) {
+ reclaim = true;
+ }
+
+ if (reclaim) {
+ tolud = tolud & ~0x3f;
+ tom = tom & ~0x3f;
+ reclaimbase = MAX(0x1000, tom);
+ reclaimlimit = reclaimbase + (MIN(0x1000, tom) - tolud) - 0x40;
+ }
+
touud = tom;
+ if (reclaim) {
+ touud = reclaimlimit + 0x40;
+ }
+
gfxbase = tolud - gfxsize;
gttbase = gfxbase - gttsize;
tsegbase = gttbase - tsegsize;
pci_write_config16(PCI_DEV(0,0,0), 0xb0, tolud << 4);
pci_write_config16(PCI_DEV(0,0,0), 0xa0, tom >> 6);
+ if (reclaim) {
+ pci_write_config16(PCI_DEV(0,0,0), 0x98,
+ (u16)(reclaimbase >> 6));
+ pci_write_config16(PCI_DEV(0,0,0), 0x9a,
+ (u16)(reclaimlimit >> 6));
+ }
pci_write_config16(PCI_DEV(0,0,0), 0xa2, touud);
pci_write_config32(PCI_DEV(0,0,0), 0xa4, gfxbase << 20);
pci_write_config32(PCI_DEV(0,0,0), 0xa8, gttbase << 20);
@@ -1994,7 +2019,15 @@ void raminit_ddr2(struct sysinfo *s)
printk(BIOS_DEBUG, "Done power settings\n");
// ME related
- //MCHBAR32(0xa30) = MCHBAR32(0xa30) | (1 << 26);
+ if (RANK_IS_POPULATED(s->dimms, 0, 0)
+ || RANK_IS_POPULATED(s->dimms, 1, 0)) {
+ MCHBAR8(0xa2f) = MCHBAR8(0xa2f) | (1 << 0);
+ }
+ if (RANK_IS_POPULATED(s->dimms, 0, 1)
+ || RANK_IS_POPULATED(s->dimms, 1, 1)) {
+ MCHBAR8(0xa2f) = MCHBAR8(0xa2f) | (1 << 1);
+ }
+ MCHBAR32(0xa30) = MCHBAR32(0xa30) | (1 << 26);
printk(BIOS_DEBUG, "Done ddr2\n");
}
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