[coreboot-gerrit] Patch set updated for coreboot: soc/braswell: Fix leakage on V1P8S rail
Hannah Williams (hannah.williams@intel.com)
gerrit at coreboot.org
Sat Jan 23 00:57:37 CET 2016
Hannah Williams (hannah.williams at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12730
-gerrit
commit 790ee7066713be70f263ae500931b0059312a6d1
Author: Shobhit Srivastava <shobhit.srivastava at intel.com>
Date: Mon Aug 10 11:48:23 2015 +0530
soc/braswell: Fix leakage on V1P8S rail
Tristate MMC1_RCLK pin to fix leakage on V1P8S rail.
Original-Reviewed-on: https://chromium-review.googlesource.com/292043
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Original-Tested-by: Divagar Mohandass <divagar.mohandass at intel.com>
Change-Id: I76cc9211ba93b2596d3c0d772d99f8934656e01c
Signed-off-by: Shobhit Srivastava <shobhit.srivastava at intel.com>
---
src/soc/intel/braswell/include/soc/gpio.h | 1 +
src/soc/intel/braswell/smihandler.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/src/soc/intel/braswell/include/soc/gpio.h b/src/soc/intel/braswell/include/soc/gpio.h
index 4ab6592..c7bfb65 100644
--- a/src/soc/intel/braswell/include/soc/gpio.h
+++ b/src/soc/intel/braswell/include/soc/gpio.h
@@ -105,6 +105,7 @@
#define MMC1_D5_MMIO_OFFSET GPIO_OFFSET(65)
#define MMC1_D6_MMIO_OFFSET GPIO_OFFSET(63)
#define MMC1_D7_MMIO_OFFSET GPIO_OFFSET(68)
+#define MMC1_RCLK_OFFSET GPIO_OFFSET(69)
#define HV_DDI2_DDC_SDA_MMIO_OFFSET GPIO_OFFSET(62)
#define HV_DDI2_DDC_SCL_MMIO_OFFSET GPIO_OFFSET(67)
#define CFIO_139_MMIO_OFFSET GPIO_OFFSET(64)
diff --git a/src/soc/intel/braswell/smihandler.c b/src/soc/intel/braswell/smihandler.c
index dabc0d2..760fba3 100644
--- a/src/soc/intel/braswell/smihandler.c
+++ b/src/soc/intel/braswell/smihandler.c
@@ -117,6 +117,8 @@ static void tristate_gpios(uint32_t val)
MMC1_D6_MMIO_OFFSET, val);
write32((void *)COMMUNITY_GPSOUTHEAST_BASE +
MMC1_D7_MMIO_OFFSET, val);
+ write32((void *)COMMUNITY_GPSOUTHEAST_BASE +
+ MMC1_RCLK_OFFSET, val);
/* Tri-state HDMI */
write32((void *)COMMUNITY_GPNORTH_BASE +
More information about the coreboot-gerrit
mailing list