[coreboot-gerrit] Patch set updated for coreboot: soc/apollolake: Add support for memory-mapped boot media
Alexandru Gagniuc (mr.nuke.me@gmail.com)
gerrit at coreboot.org
Mon Jan 25 18:03:02 CET 2016
Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13309
-gerrit
commit 3f361e5dd0e734a84367e1784f7a3e4c39fca3da
Author: Andrey Petrov <andrey.petrov at intel.com>
Date: Wed Oct 14 11:16:30 2015 -0700
soc/apollolake: Add support for memory-mapped boot media
On Apollo Lake SPI flash is memory mapped. The mapping is
different to previous platforms. Only "BIOS" region is mapped
in contrast to whole flash.
Change-Id: Ib57e01310c1a2b91e027abcbd6ac2c5cad9fddf3
Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
---
src/arch/x86/Makefile.inc | 3 ++
src/soc/intel/apollolake/Makefile.inc | 1 +
src/soc/intel/apollolake/mmap_boot.c | 63 +++++++++++++++++++++++++++++++++++
3 files changed, 67 insertions(+)
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 75767cb..e97b3d7 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -144,6 +144,9 @@ ifeq ($(CONFIG_SSE),y)
bootblock_romccflags := -mcpu=k7 -msse -O2 -D__PRE_RAM__ -D__BOOTBLOCK__
endif
+bootblock-y += memset.c
+bootblock-y += memcpy.c
+
# This is a hack in case there are no per chipset linker files.
$(objgenerated)/empty: build-dirs
touch $@
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 9d3897f..0af3f36 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -13,6 +13,7 @@ bootblock-y += gpio.c
bootblock-y += bootblock/cache_as_ram.S
bootblock-y += bootblock/early_chipset_config.S
bootblock-y += uart_early.c
+bootblock-y += mmap_boot.c
romstage-y += cpu.c
romstage-y += gpio.c
diff --git a/src/soc/intel/apollolake/mmap_boot.c b/src/soc/intel/apollolake/mmap_boot.c
new file mode 100644
index 0000000..7e9080b
--- /dev/null
+++ b/src/soc/intel/apollolake/mmap_boot.c
@@ -0,0 +1,63 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Andrey Petrov <andrey.petrov at intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <boot_device.h>
+#include <console/console.h>
+#include <cbfs.h>
+#include <endian.h>
+#include <stdlib.h>
+#include <commonlib/region.h>
+#include <fmap.h>
+
+/*
+ * If Apollo Lake is configured to boot from SPI flash "BIOS" region
+ * (as defined in descriptor) is mapped below 4GiB. Form a pointer for
+ * the base.
+ */
+#define ROM_BASE ((void *)(uintptr_t)(0x100000000ULL - CONFIG_IFD_BIOS_SIZE))
+
+static const struct mem_region_device boot_dev = {
+ .base = (void *) ROM_BASE,
+ /* typically not whole flash is memory mapped */
+ .rdev = REGION_DEV_INIT(&mem_rdev_ops, CONFIG_IFD_BIOS_START,
+ CONFIG_IFD_BIOS_SIZE)
+};
+
+const struct region_device *boot_device_ro(void)
+{
+ return &boot_dev.rdev;
+}
+
+static int iafw_boot_region_properties(struct cbfs_props *props)
+{
+ struct region regn;
+
+ /* use fmap to locate CBFS area */
+ if (fmap_locate_area("COREBOOT", ®n))
+ return 1;
+
+ props->offset = regn.offset;
+ props->size = regn.size;
+
+ printk(BIOS_DEBUG, "CBFS @ %zx size %zx\n", props->offset, props->size);
+
+ return 0;
+}
+
+/*
+ * Named cbfs_master_header_locator so that it overrides the default, but
+ * incompatible locator in cbfs.c
+ */
+const struct cbfs_locator cbfs_master_header_locator = {
+ .name = "IAFW Locator",
+ .locate = iafw_boot_region_properties,
+};
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