[coreboot-gerrit] Patch merged into coreboot/master: soc/braswell: Fix DSP clock
gerrit at coreboot.org
gerrit at coreboot.org
Thu Jan 28 20:34:09 CET 2016
the following patch was just integrated into master:
commit aff502e87ae57fa2dc09367d00f143b6befb9530
Author: fdurairx <felixx.durairaj at intel.com>
Date: Fri Aug 21 15:36:53 2015 -0700
soc/braswell: Fix DSP clock
The codec clock frequency was incorrectly set to 25MHz.
The only available frequency is 19.2MHz through external clock and PLL.
Original-Reviewed-on: https://chromium-review.googlesource.com/295768
Original-Tested-by: Hannah Williams <hannah.williams at intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Change-Id: I9bef334a5a3aaee28fcc4937180896ff49969bc5
Signed-off-by: Felix Durairaj <felixx.durairaj at intel.com>
Reviewed-on: https://review.coreboot.org/12732
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth at google.com>
See https://review.coreboot.org/12732 for details.
-gerrit
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