[coreboot-gerrit] Patch merged into coreboot/master: soc/braswell: Configure Boot Flash Write Protect status GPIO
gerrit at coreboot.org
gerrit at coreboot.org
Thu Jan 28 20:36:07 CET 2016
the following patch was just integrated into master:
commit 26f64069d26fd23a30d85c3128ce748ebdff5fcd
Author: Hannah Williams <hannah.williams at intel.com>
Date: Wed May 13 21:48:52 2015 -0700
soc/braswell: Configure Boot Flash Write Protect status GPIO
Set up the GPIO(MF_ISH_GPIO_4) to read WP status.
TEST=Use crossystem to read the WP status
Signed-off-by: Hannah Williams <hannah.williams at intel.com>
Change-Id: I17cbcba013e2a11c2527731df985aa1243065eff
Original-Reviewed-on: https://chromium-review.googlesource.com/302424
Original-Tested-by: John Zhao <john.zhao at intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Original-Commit-Queue: Hannah Williams <hannah.williams at intel.com>
Signed-off-by: Hannah Williams <hannah.williams at intel.com>
Reviewed-on: https://review.coreboot.org/13185
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth at google.com>
See https://review.coreboot.org/13185 for details.
-gerrit
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