[coreboot-gerrit] Patch set updated for coreboot: mainboard/google/reef: apply EVT board changes
Aaron Durbin (adurbin@chromium.org)
gerrit at coreboot.org
Thu Jul 7 07:06:01 CEST 2016
Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15562
-gerrit
commit f99ac39dddfb094fefb03a0ed525df796bebab1c
Author: Aaron Durbin <adurbin at chromium.org>
Date: Wed Jul 6 23:16:01 2016 -0500
mainboard/google/reef: apply EVT board changes
Based on the board revision apply the correct GPIO
changes. The only differences are the addition
of peripheral wake signals.
BUG=chrome-os-partner:54960,chrome-os-partner:54961
BRANCH=None
TEST=Built and tested on reef.
Change-Id: I9cac82158e70e0af1b454ec4581c2e4622b95b4b
Signed-off-by: Aaron Durbin <adurbin at chromuim.org>
---
src/mainboard/google/reef/gpio.h | 13 +++++++++++--
src/mainboard/google/reef/mainboard.c | 14 ++++++++++++++
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/google/reef/gpio.h b/src/mainboard/google/reef/gpio.h
index 14cf880c..c54ba4c 100644
--- a/src/mainboard/google/reef/gpio.h
+++ b/src/mainboard/google/reef/gpio.h
@@ -274,7 +274,6 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPIO_0, UP_20K, DEEP),
PAD_CFG_GPI(GPIO_1, UP_20K, DEEP),
PAD_CFG_GPI(GPIO_2, UP_20K, DEEP),
- PAD_CFG_GPI(GPIO_3, UP_20K, DEEP),
PAD_CFG_GPI(GPIO_4, UP_20K, DEEP),
PAD_CFG_GPI(GPIO_5, UP_20K, DEEP),
PAD_CFG_GPI(GPIO_6, UP_20K, DEEP),
@@ -287,7 +286,6 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPIO_12, UP_20K, DEEP), /* unused */
PAD_CFG_GPI(GPIO_13, UP_20K, DEEP), /* unused */
PAD_CFG_GPI_APIC(GPIO_14, UP_20K, DEEP, LEVEL, NONE), /* FP IRQ */
- PAD_CFG_GPI(GPIO_15, UP_20K, DEEP), /* unused */
PAD_CFG_GPI(GPIO_16, UP_20K, DEEP), /* unused */
PAD_CFG_GPI(GPIO_17, UP_20K, DEEP), /* unused */
PAD_CFG_GPI_APIC(GPIO_18, NONE, DEEP, LEVEL, NONE), /* Trackpad IRQ */
@@ -356,5 +354,16 @@ static const struct pad_config early_gpio_table[] = {
#define MEM_CONFIG1 GPIO_102
#define MEM_CONFIG0 GPIO_101
+static const struct pad_config wake_signals_proto[] = {
+ PAD_CFG_GPI(GPIO_15, UP_20K, DEEP), /* unused */
+ PAD_CFG_GPI(GPIO_3, UP_20K, DEEP), /* unused */
+};
+
+/* Wake peripheral signals post proto. */
+static const struct pad_config wake_signals[] = {
+ PAD_CFG_GPI_SCI(GPIO_15, NONE, DEEP, LEVEL, NONE), /* TRACKPAD_INT_1V8_ODL */
+ PAD_CFG_GPI_SCI(GPIO_3, UP_20K, DEEP, LEVEL, NONE), /* FP_INT_L */
+};
+
#endif /* __ACPI__ */
#endif /* MAINBOARD_GPIO_H */
diff --git a/src/mainboard/google/reef/mainboard.c b/src/mainboard/google/reef/mainboard.c
index 2b121ef..c66bb91 100644
--- a/src/mainboard/google/reef/mainboard.c
+++ b/src/mainboard/google/reef/mainboard.c
@@ -14,6 +14,7 @@
*/
#include <arch/acpi.h>
+#include <boardid.h>
#include <console/console.h>
#include <device/device.h>
#include <nhlt.h>
@@ -24,7 +25,20 @@
static void mainboard_init(void *chip_info)
{
+ int boardid;
+
+ boardid = board_id();
+ printk(BIOS_INFO, "Board ID: %d\n", boardid);
+
gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
+
+ /* Apply proto board settings if board matches. */
+ if (boardid == 0)
+ gpio_configure_pads(wake_signals_proto,
+ ARRAY_SIZE(wake_signals_proto));
+ else
+ gpio_configure_pads(wake_signals, ARRAY_SIZE(wake_signals));
+
mainboard_ec_init();
}
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