[coreboot-gerrit] Patch set updated for coreboot: intel post-car: Delay ACPI S3 backup until ramstage loader
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Fri Jul 8 20:57:52 CEST 2016
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15469
-gerrit
commit 75d54f9201e4e71226293cceafe2960ab04a2475
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Mon Jun 27 12:13:48 2016 +0300
intel post-car: Delay ACPI S3 backup until ramstage loader
Change-Id: If0060b9ad8703a3d6524004fb69cb2171f8d89a3
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/mainboard/lenovo/t400/romstage.c | 1 -
src/mainboard/lenovo/x200/romstage.c | 1 -
src/mainboard/lenovo/x201/romstage.c | 1 -
src/mainboard/packardbell/ms2290/romstage.c | 1 -
src/mainboard/roda/rk9/romstage.c | 1 -
src/northbridge/intel/i945/early_init.c | 1 -
src/northbridge/intel/sandybridge/early_init.c | 1 -
7 files changed, 7 deletions(-)
diff --git a/src/mainboard/lenovo/t400/romstage.c b/src/mainboard/lenovo/t400/romstage.c
index f518775..0e7309d 100644
--- a/src/mainboard/lenovo/t400/romstage.c
+++ b/src/mainboard/lenovo/t400/romstage.c
@@ -179,7 +179,6 @@ void mainboard_romstage_entry(unsigned long bist)
* this is not a resume. In that case we just create the cbmem toc.
*/
if (s3resume && cbmem_initted) {
- acpi_prepare_for_resume();
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0, 0), D0F0_SKPD, SKPAD_ACPI_S3_MAGIC);
diff --git a/src/mainboard/lenovo/x200/romstage.c b/src/mainboard/lenovo/x200/romstage.c
index 1deab65..db1d62f 100644
--- a/src/mainboard/lenovo/x200/romstage.c
+++ b/src/mainboard/lenovo/x200/romstage.c
@@ -179,7 +179,6 @@ void mainboard_romstage_entry(unsigned long bist)
* this is not a resume. In that case we just create the cbmem toc.
*/
if (s3resume && cbmem_initted) {
- acpi_prepare_for_resume();
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0, 0), D0F0_SKPD, SKPAD_ACPI_S3_MAGIC);
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index 2bfa19c..7b8d7f9 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -282,7 +282,6 @@ void mainboard_romstage_entry(unsigned long bist)
* this is not a resume. In that case we just create the cbmem toc.
*/
if (s3resume) {
- acpi_prepare_for_resume();
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, 0xcafed00d);
diff --git a/src/mainboard/packardbell/ms2290/romstage.c b/src/mainboard/packardbell/ms2290/romstage.c
index 92ee021..04c9513 100644
--- a/src/mainboard/packardbell/ms2290/romstage.c
+++ b/src/mainboard/packardbell/ms2290/romstage.c
@@ -272,7 +272,6 @@ void mainboard_romstage_entry(unsigned long bist)
* this is not a resume. In that case we just create the cbmem toc.
*/
if (s3resume) {
- acpi_prepare_for_resume();
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, 0xcafed00d);
diff --git a/src/mainboard/roda/rk9/romstage.c b/src/mainboard/roda/rk9/romstage.c
index fc0c8d3..e8bd1e2 100644
--- a/src/mainboard/roda/rk9/romstage.c
+++ b/src/mainboard/roda/rk9/romstage.c
@@ -192,7 +192,6 @@ void mainboard_romstage_entry(unsigned long bist)
* this is not a resume. In that case we just create the cbmem toc.
*/
if (s3resume && cbmem_initted) {
- acpi_prepare_for_resume();
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0, 0), D0F0_SKPD, SKPAD_ACPI_S3_MAGIC);
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index ade120f..3164f25 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -900,7 +900,6 @@ static void i945_prepare_resume(int s3resume)
* this is not a resume. In that case we just create the cbmem toc.
*/
if (s3resume && cbmem_was_initted) {
- acpi_prepare_for_resume();
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD,
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c
index a013ec3..86d1c00 100644
--- a/src/northbridge/intel/sandybridge/early_init.c
+++ b/src/northbridge/intel/sandybridge/early_init.c
@@ -234,7 +234,6 @@ void northbridge_romstage_finalize(int s3resume)
*/
if (s3resume) {
- acpi_prepare_for_resume();
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, 0xcafed00d);
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