[coreboot-gerrit] Patch set updated for coreboot: amd/agesa/f16kb: Allow SATA Gen3
Fabian Kunkel (fabi@adv.bruhnspace.com)
gerrit at coreboot.org
Wed Jul 20 10:49:07 CEST 2016
Fabian Kunkel (fabi at adv.bruhnspace.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15728
-gerrit
commit 36230461cb062d918193d54673a4448835147500
Author: Fabian Kunkel <fabi at adv.bruhnspace.com>
Date: Mon Jul 18 17:39:28 2016 +0200
amd/agesa/f16kb: Allow SATA Gen3
YangtzeSataResetService implements the SataSetMaxGen2 double.
The value should be only set, if the condition is met.
For testing, add
FchParams_env->Sata.SataMode.SataSetMaxGen2 = FALSE;
to your BiosCallOuts.c, which enables GEN3 for the SATA ports.
Patch is tested with bap/e20xx board, Lubuntu 16.04 Kernel 4.4.
$ dmesg | grep ahci #before patch
ahci 0000:00:11.0: AHCI 0001.0300 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
$ dmesg | grep ahci #after patch
ahci 0000:00:11.0: AHCI 0001.0300 32 slots 2 ports 6 Gbps 0x3 impl SATA mode
Change-Id: I17a493b876a4be3236736b2116b331e465b159af
Signed-off-by: Fabian Kunkel <fabi at adv.bruhnspace.com>
---
.../agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/YangtzeSataResetService.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/YangtzeSataResetService.c b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/YangtzeSataResetService.c
index 9b14467..3142899 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/YangtzeSataResetService.c
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/YangtzeSataResetService.c
@@ -78,7 +78,6 @@ FchInitResetSataProgram (
if ( LocalCfgPtr->SataSetMaxGen2 ) {
FchSataMode |= 0x04;
}
- FchSataMode |= 0x04;
RwPci (((SATA_BUS_DEV_FUN << 16) + 0x0A0), AccessWidth8, (UINT32)~(BIT2 + BIT3 + BIT4 + BIT5 + BIT6), 0, StdHeader);
FchSataClkMode = LocalCfgPtr->SataClkMode;
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