[coreboot-gerrit] New patch to review for coreboot: src/drivers: Capitalize CPU, RAM and ACPI
HAOUAS Elyes (ehaouas@noos.fr)
gerrit at coreboot.org
Sat Jul 30 15:38:47 CEST 2016
HAOUAS Elyes (ehaouas at noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15983
-gerrit
commit 23ccee526f21d99ee0261f58c548ef667c22577e
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date: Sat Jul 30 15:37:26 2016 +0200
src/drivers: Capitalize CPU, RAM and ACPI
Change-Id: I720469ea1df75544f5b1e0cab718502d8a9cf197
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
src/drivers/i2c/w83795/w83795.c | 2 +-
src/drivers/intel/fsp1_1/cache_as_ram.inc | 2 +-
src/drivers/intel/fsp1_1/car.c | 4 ++--
src/drivers/intel/fsp1_1/include/fsp/car.h | 2 +-
src/drivers/intel/fsp1_1/include/fsp/gma.h | 2 +-
src/drivers/intel/fsp1_1/romstage.c | 2 +-
src/drivers/pc80/vga/vga.c | 2 +-
7 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/drivers/i2c/w83795/w83795.c b/src/drivers/i2c/w83795/w83795.c
index 78397ba..24da12c 100644
--- a/src/drivers/i2c/w83795/w83795.c
+++ b/src/drivers/i2c/w83795/w83795.c
@@ -361,7 +361,7 @@ static void w83795_hwm_init(struct device *dev)
info = cpu_info();
cpu = info->cpu;
if (!cpu)
- die("CPU: missing cpu device structure");
+ die("CPU: missing CPU device structure");
if (cpu->vendor == X86_VENDOR_AMD)
w83795_init(dev, THERMAL_CRUISE_MODE, DTS_SRC_AMD_SBTSI);
diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.inc b/src/drivers/intel/fsp1_1/cache_as_ram.inc
index 6e7e50b..6611fa1 100644
--- a/src/drivers/intel/fsp1_1/cache_as_ram.inc
+++ b/src/drivers/intel/fsp1_1/cache_as_ram.inc
@@ -154,7 +154,7 @@ before_romstage:
call cache_as_ram_main
/* One will never return from cache_as_ram_main() in verstage so there's
- * no such thing as after ram init. */
+ * no such thing as after RAM init. */
#if !ENV_VERSTAGE
#include "after_raminit.S"
#endif
diff --git a/src/drivers/intel/fsp1_1/car.c b/src/drivers/intel/fsp1_1/car.c
index b525a62..7eceebf 100644
--- a/src/drivers/intel/fsp1_1/car.c
+++ b/src/drivers/intel/fsp1_1/car.c
@@ -69,7 +69,7 @@ asmlinkage void *cache_as_ram_main(struct cache_as_ram_params *car_params)
set_fih_car(car_params->fih);
- /* Return new stack value in ram back to assembly stub. */
+ /* Return new stack value in RAM back to assembly stub. */
return cache_as_ram_stage_main(car_params->fih);
}
@@ -93,7 +93,7 @@ asmlinkage void *romstage_after_verstage(void)
set_fih_car(fih);
- /* Return new stack value in ram back to assembly stub. */
+ /* Return new stack value in RAM back to assembly stub. */
return cache_as_ram_stage_main(fih);
}
diff --git a/src/drivers/intel/fsp1_1/include/fsp/car.h b/src/drivers/intel/fsp1_1/include/fsp/car.h
index 56400a7..88dca9a 100644
--- a/src/drivers/intel/fsp1_1/include/fsp/car.h
+++ b/src/drivers/intel/fsp1_1/include/fsp/car.h
@@ -34,7 +34,7 @@ asmlinkage void *cache_as_ram_main(struct cache_as_ram_params *car_params);
asmlinkage void after_cache_as_ram(void *chipset_context);
asmlinkage void *romstage_after_verstage(void);
/* Per stage calls from the above two functions. The void * return from
- * cache_as_ram_stage_main() is the stack pointer to use in ram after
+ * cache_as_ram_stage_main() is the stack pointer to use in RAM after
* exiting cache-as-ram mode. */
void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih);
void after_cache_as_ram_stage(void);
diff --git a/src/drivers/intel/fsp1_1/include/fsp/gma.h b/src/drivers/intel/fsp1_1/include/fsp/gma.h
index 8797932..f5ca2e6 100644
--- a/src/drivers/intel/fsp1_1/include/fsp/gma.h
+++ b/src/drivers/intel/fsp1_1/include/fsp/gma.h
@@ -52,7 +52,7 @@ typedef struct {
#define SBIOS_VERSION_SIZE 32
-/* mailbox 1: public acpi methods */
+/* mailbox 1: public ACPI methods */
typedef struct {
u32 drdy;
u32 csts;
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index b5d90c3..a95e5e6 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -51,7 +51,7 @@ asmlinkage void *romstage_main(FSP_INFO_HEADER *fih)
timestamp_add_now(TS_START_ROMSTAGE);
- /* Load microcode before ram init */
+ /* Load microcode before RAM init */
if (IS_ENABLED(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS))
intel_update_microcode_from_cbfs();
diff --git a/src/drivers/pc80/vga/vga.c b/src/drivers/pc80/vga/vga.c
index 740910c..6e225e9 100644
--- a/src/drivers/pc80/vga/vga.c
+++ b/src/drivers/pc80/vga/vga.c
@@ -53,7 +53,7 @@ vga_fb_init(void)
vga_gr_write(0x07, 0x00);
vga_gr_write(0x08, 0xFF);
- /* o/e enable: ram enable */
+ /* o/e enable: RAM enable */
vga_misc_mask(0x22, 0x22);
}
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