[coreboot-gerrit] Patch set updated for coreboot: drivers/intel/fsp2_0: Monitor FSP setting of MTRRs
Lee Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Sun Jul 31 02:17:56 CEST 2016
Lee Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15849
-gerrit
commit 85feccb333302a5107d9b31e360f1598ee0faa9e
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Sun Jul 24 08:26:06 2016 -0700
drivers/intel/fsp2_0: Monitor FSP setting of MTRRs
Display the MTRR values in the following locations:
* Before the call to FspMemoryInit to document coreboot settings
* After the call to FspMemoryInit
* After the call to FspSiliconInit
* After the call to FspNotify
TEST=Build and run on Galileo Gen2
Change-Id: I8942ef4ca4677501a5c38abaff1c3489eebea53c
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
src/drivers/intel/fsp2_0/include/fsp/debug.h | 33 ++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/src/drivers/intel/fsp2_0/include/fsp/debug.h b/src/drivers/intel/fsp2_0/include/fsp/debug.h
index 3fbc609..976e0fe 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/debug.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/debug.h
@@ -17,13 +17,34 @@
#include <fsp/api.h>
#include <fsp/util.h>
#include <memrange.h>
+#include <soc/intel/common/util.h>
+/*-----------
+ * HOBs
+ *-----------
+ */
struct hob_header {
uint16_t type;
uint16_t length;
} __attribute__((packed));
/*-----------
+ * MTRRs
+ *-----------
+ */
+#if IS_ENABLED(CONFIG_DISPLAY_MTRRS)
+static inline __attribute__((always_inline)) void fsp_display_mtrrs(void)
+{
+ /* Display the MTRRs */
+ soc_display_mtrrs();
+}
+#else /* CONFIG_DISPLAY_MTRRS */
+static inline __attribute__((always_inline)) void fsp_display_mtrrs(void)
+{
+}
+#endif /* CONFIG_DISPLAY_MTRRS */
+
+/*-----------
* MemoryInit
*-----------
*/
@@ -36,6 +57,9 @@ static inline __attribute__((always_inline)) void fsp_debug_before_memory_init(
const struct FSPM_UPD *fspm_new_upd,
void **hob_list_ptr)
{
+ /* Display the MTRRs */
+ fsp_display_mtrrs();
+
/* Display the call entry point and paramters */
if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS)) {
printk(BIOS_DEBUG, "Calling FspMemoryInit: 0x%p\n",
@@ -50,6 +74,9 @@ static inline __attribute__((always_inline)) void fsp_debug_memory_init(
{
if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_DEBUG, "FspMemoryInit returned 0x%08x\n", status);
+
+ /* Display the MTRRs */
+ fsp_display_mtrrs();
}
/*-----------
@@ -75,6 +102,9 @@ static inline __attribute__((always_inline)) void fsp_debug_silicon_init(
{
if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_SPEW, "FspSiliconInit returned 0x%08x\n", status);
+
+ /* Display the MTRRs */
+ fsp_display_mtrrs();
}
/*-----------
@@ -105,6 +135,9 @@ static inline __attribute__((always_inline)) void fsp_debug_notify(
{
if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_SPEW, "FspNotify returned 0x%08x\n", status);
+
+ /* Display the MTRRs */
+ fsp_display_mtrrs();
}
#endif /* _FSP2_0_DEBUG_H_ */
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