[coreboot-gerrit] New patch to review for coreboot: rk3399: add ability to configure SPI5

[Martin Roth (martinroth@google.com)]

Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15030

-gerrit

commit 7eeee1301c2fb71d6acafc87a9e8c0e05d6603e7
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Sun May 22 16:00:05 2016 -0700

    rk3399: add ability to configure SPI5
    
    This defines mux settings for the GPIO bank responsible for SPI
    interface #5.
    
    BRANCH=none
    BUG=chrome-os-partner:51537
    TEST=with the rest of the patches applied it is possible to
         communicate with the EC on gru: pressing Ctrl-U during boot
         allows to start Chrome OS from the SD card.
    
    Change-Id: Ibc2293b5662892f7b275434f9a672ef68edf4f9e
    Signed-off-by: Martin Roth <martinroth at chromium.org>
    Original-Commit-Id: 4f92452
    Original-Change-Id: Idf55c069b05492f8cdc204a8c273e39a19a3aef3
    Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/346630
    Original-Tested-by: Shunqian Zheng <zhengsq at rock-chips.com>
---
 src/soc/rockchip/rk3399/include/soc/grf.h | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/soc/rockchip/rk3399/include/soc/grf.h b/src/soc/rockchip/rk3399/include/soc/grf.h
index df1fb03..0765349 100644
--- a/src/soc/rockchip/rk3399/include/soc/grf.h
+++ b/src/soc/rockchip/rk3399/include/soc/grf.h
@@ -123,7 +123,10 @@ struct rk3399_grf_regs {
 		u32 iomux_spi2;
 		u32 gpio2b_iomux;
 	};
-	u32 gpio2c_iomux;
+	union {
+		u32 gpio2c_iomux;
+		u32 iomux_spi5;
+	};
 	u32 gpio2d_iomux;
 	u32 gpio3a_iomux;
 	u32 gpio3b_iomux;
@@ -336,6 +339,8 @@ static struct rk3399_pmusgrf_regs * const rk3399_pmusgrf = (void *)PMUSGRF_BASE;
 #define IOMUX_SPI1_RX	RK_CLRSETBITS(3 << 14, 2 << 14)
 #define IOMUX_SPI1_CSCLKTX	RK_CLRSETBITS(0x3f << 0, 2 << 4 |\
 					      2 << 2 | 2 << 0)
+#define IOMUX_SPI5     RK_CLRSETBITS(0xff << 8, \
+				     2 << 14 | 2 << 12 | 2 << 10 | 2 << 8)
 #define IOMUX_SDMMC	RK_CLRSETBITS(0xfff, 1 << 10 | 1 << 8 | 1 << 6 |\
 					     1 << 4 | 1 << 2 | 1 << 0)
 #define IOMUX_I2C0_SCL	RK_CLRSETBITS(3 << 0, 2 << 0)