[coreboot-gerrit] Patch set updated for coreboot: mainboard/intel/amenia: Use common NHLT

Saurabh Satija (saurabh.satija@intel.com) gerrit at coreboot.org
Wed Jun 1 01:39:23 CEST 2016


Saurabh Satija (saurabh.satija at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15024

-gerrit

commit e4fd95a5849b1960984f884b3aa7d51491932e33
Author: Saurabh Satija <saurabh.satija at intel.com>
Date:   Thu May 26 16:08:45 2016 -0700

    mainboard/intel/amenia: Use common NHLT
    
    Adding the ACPI NHLT table generation that the current hardware
    supports.
    
    Amenia has support for two audio codecs Nuvoton and Dialog for
    headphones and Maxim for speakers.
    
    Change-Id: Iaba9ec81ffb4f128f2e4413dec5174d9ecb856c9
    Signed-off-by: Saurabh Satija <saurabh.satija at intel.com>
---
 src/mainboard/intel/amenia/Kconfig     |  8 +++
 src/mainboard/intel/amenia/dsdt.asl    |  1 +
 src/mainboard/intel/amenia/mainboard.c | 90 +++++++++++++++++++++++++++++++++-
 3 files changed, 98 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/intel/amenia/Kconfig b/src/mainboard/intel/amenia/Kconfig
index bfc4091..edf9d91 100644
--- a/src/mainboard/intel/amenia/Kconfig
+++ b/src/mainboard/intel/amenia/Kconfig
@@ -14,6 +14,8 @@ config BOARD_SPECIFIC_OPTIONS
 	select MAINBOARD_HAS_CHROMEOS
 	select SYSTEM_TYPE_LAPTOP
 	select TPM_ON_FAST_SPI
+	select ACPI_NHLT
+	select USE_COMMON_AUDIO
 
 config CHROMEOS
 	bool
@@ -64,4 +66,10 @@ config MAX_CPUS
 	int
 	default 8
 
+config INCLUDE_AUDIO_BLOBS
+        bool "Include blobs for audio."
+        select AUDIO_DMIC_2CH_16B
+        select AUDIO_SPEAKER
+        select AUDIO_HEADSET
+
 endif # BOARD_INTEL_AMENIA
diff --git a/src/mainboard/intel/amenia/dsdt.asl b/src/mainboard/intel/amenia/dsdt.asl
index 19e7360..1be4a9f 100644
--- a/src/mainboard/intel/amenia/dsdt.asl
+++ b/src/mainboard/intel/amenia/dsdt.asl
@@ -29,6 +29,7 @@ DefinitionBlock(
 		{
                 #include <soc/intel/apollolake/acpi/northbridge.asl>
                 #include <soc/intel/apollolake/acpi/southbridge.asl>
+		#include <soc/intel/apollolake/acpi/pch.asl
 		}
 	}
 	/* Mainboard Specific devices */
diff --git a/src/mainboard/intel/amenia/mainboard.c b/src/mainboard/intel/amenia/mainboard.c
index 22304f8..40a65ff 100644
--- a/src/mainboard/intel/amenia/mainboard.c
+++ b/src/mainboard/intel/amenia/mainboard.c
@@ -16,8 +16,14 @@
  */
 
 #include <device/device.h>
+#include <pc80/keyboard.h>
 #include <soc/gpio.h>
 #include <soc/pci_devs.h>
+#include <drivers/audio.h>
+#include <arch/acpi.h>
+#include <console/console.h>
+#include <stdlib.h>
+#include <string.h>
 #include "ec.h"
 
 /* TODO: Move GPIO config to its own file once we get more GPIOs in the list */
@@ -89,7 +95,6 @@ static const struct pad_config amenia_gpios[] = {
 	PAD_CFG_GPO(GPIO_154, 1, DEEP),			/* BT_DISABLE_1P8_N */
 	PAD_CFG_GPI(GPIO_167, NONE, DEEP),		/* DB_ID */
 
-
 	PAD_CFG_NF(GPIO_172, UP_20K, DEEP, NF1),	/* SDCARD_CLK */
 	PAD_CFG_NF(GPIO_173, UP_20K, DEEP, NF1),	/* SDCARD_D0 */
 	PAD_CFG_NF(GPIO_174, UP_20K, DEEP, NF1),	/* SDCARD_D1 */
@@ -114,6 +119,9 @@ static const struct pad_config amenia_gpios[] = {
 	PAD_CFG_NF(GPIO_165, UP_20K, DEEP, NF1),    /* EMMC0_CMD */
 	PAD_CFG_NF(GPIO_182, DN_20K, DEEP, NF1),    /* EMMC_RCLK */
 
+	PAD_CFG_NF(GPIO_199, UP_20K, DEEP, NF1),	/* DDI0_HPD */
+	PAD_CFG_NF(GPIO_200, UP_20K, DEEP, NF1),	/* DDI1_HPD */
+
 	PAD_CFG_NF(GPIO_203, NATIVE, DEEP, NF1),	/* USB2_OC0_3p3_N */
 	PAD_CFG_NF(GPIO_204, NATIVE, DEEP, NF1),	/* USB2_OC2_N */
 
@@ -129,15 +137,95 @@ static const struct pad_config amenia_gpios[] = {
 	PAD_CFG_NF(GPIO_199, UP_20K, DEEP, NF2),	/* HV_DDI1_HPD */
 	PAD_CFG_NF(GPIO_200, UP_20K, DEEP, NF2),	/* HV_DDI0_HPD */
 	PAD_CFG_NF(PMC_SPI_FS1, NATIVE, DEEP, NF2),	/* HV_DDI2_HPD */
+};
+
 
+const struct nhlt_format_config dmic_2ch_cfg[] = {
+	/* 48 KHz 16-bits per sample. */
+	{
+		.num_channels = 2,
+		.sample_freq_khz = 48,
+		.container_bits_per_sample = 16,
+		.valid_bits_per_sample = 16,
+		.settings_file = "dmic-2ch-48khz-16b.bin",
+	},
+};
+
+const struct nhlt_format_config headset_cfg[] = {
+        /* 48 KHz 24-bits per sample. */
+        {
+                .num_channels = 2,
+                .sample_freq_khz = 48,
+                .container_bits_per_sample = 32,
+                .valid_bits_per_sample = 24,
+                .settings_file = "headset-2ch-48khz-24b.bin",
+        },
+};
+
+struct nhlt_tdm_config headset_tdm_cfg = {
+                .virtual_slot = 0,
+                .config_type = NHLT_TDM_BASIC,
+};
+
+const struct nhlt_format_config speaker_cfg[] = {
+        /* 48 KHz 24-bits per sample. */
+        {
+                .num_channels = 2,
+                .sample_freq_khz = 48,
+                .container_bits_per_sample = 32,
+                .valid_bits_per_sample = 24,
+                .settings_file = "max98357-render-2ch-48khz-24b.bin",
+        },
 };
 
 static void mainboard_init(void *chip_info)
 {
 	gpio_configure_pads(amenia_gpios, ARRAY_SIZE(amenia_gpios));
 	mainboard_ec_init();
+	pc_keyboard_init(NO_AUX_DEVICE);
+}
+
+static unsigned long mainboard_write_acpi_tables(
+        device_t device, unsigned long current, acpi_rsdp_t *rsdp)
+{
+                uintptr_t start_addr;
+                uintptr_t end_addr;
+                struct nhlt *nhlt;
+
+                start_addr = current;
+
+                nhlt = nhlt_init();
+
+                if (nhlt == NULL)
+                        return start_addr;
+
+                /* 2 Channel DMIC array. */
+		if (nhlt_soc_add_dmic_array(nhlt, dmic_2ch_cfg, ARRAY_SIZE(dmic_2ch_cfg), 2))
+			printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n");
+
+		/* NAU88l25 and Dialog have Headset codec. */
+		if (nhlt_soc_add_headset(nhlt, headset_cfg, ARRAY_SIZE(headset_cfg), &headset_tdm_cfg, AUDIO_LINK_SSP1))
+                        printk(BIOS_ERR, "Couldn't add headset codec.\n");
+
+		/* MAXIM Smart Amps for left and right. */
+		if (nhlt_soc_add_speaker(nhlt, speaker_cfg, ARRAY_SIZE(speaker_cfg), NULL, AUDIO_LINK_SSP5))
+			printk(BIOS_ERR, "Couldn't add speaker codec.\n");
+
+                end_addr = nhlt_soc_serialize(nhlt, start_addr);
+
+                if (end_addr != start_addr)
+                        acpi_add_table(rsdp, (void *)start_addr);
+
+                return end_addr;
+}
+
+static void mainboard_enable(device_t dev)
+{
+	dev->ops->write_acpi_tables = (void *) mainboard_write_acpi_tables;
 }
 
 struct chip_operations mainboard_ops = {
 	.init = mainboard_init,
+	.enable_dev = mainboard_enable,
 };
+



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