[coreboot-gerrit] Patch merged into coreboot/master: drivers/intel/wifi: Add support for generating SSDT table

gerrit at coreboot.org gerrit at coreboot.org
Thu Jun 2 05:36:24 CEST 2016


the following patch was just integrated into master:
commit 5c026445f0d455976c3d29ebdf10dd89c9f29068
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Wed May 11 14:05:07 2016 -0700

    drivers/intel/wifi: Add support for generating SSDT table
    
    Intel WiFi devices that support wake-on-wifi need to declare a Power
    Resource for this wake pin.  Typically this has been done with a
    static declaration in the DSDT for each mainboard.  By adding it to
    the existing intel/wifi driver it can be done based on a
    configuration register in the devicetree.
    
    Additionally the WiFi regulatory domain can be set in the SSDT
    directly instead of needing to use NVS to pass the value to the DSDT.
    
    Also add device IDs for Wilkins Peak 2 and Stone Peak 2 devices that
    are found on Chromebooks, and clean up a long line and some comment
    formatting.
    
    This was tested by booting on an HP Chromebook 13 device and comparing
    that the output in the SSDT matches what used to be in the DSDT.  The
    WRDD value is read from VPD, if present, not from devicetree.cb.
    
    Additionally the case where CONFIG_DRIVERS_INTEL_WIFI is enabled but
    the wifi device is not described in devicetree.cb is tested to ensure
    it still generates the AML but does not include the _PRW wake pin.
    
    Example:
    
    devicetree.cb:
      device pci 1c.0 on
        chip drivers/intel/wifi
          register "wake" = "GPE0_DW0_16"
          device pci 00.0 on end
        end
      end
    
    VPD:
      "region"="us"
    
    SSDT.dsl:
      Scope (\_SB.PCI0.RP01) {
        Device (WIFI) {
          Name (_UID, Zero)
          Name (_DDN, "Intel WiFi")
          Name (_ADR, 0x00000000)
          Name (_PRW, Package () { 16, 3 })
          Name (WRDD, Package () {
            Zero,
            Package () {
              0x00000007,
              0x00004150
            }
          })
        }
      }
    
    Change-Id: I8b5c916f1a04742507dc1ecc9a20c19d3822b18c
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://review.coreboot.org/15019
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/15019 for details.

-gerrit



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