[coreboot-gerrit] Patch merged into coreboot/master: AGESA boards: Split dispatcher to romstage and ramstage

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 062ef1cca6c1cd70828288181129ba0d0addd4ab
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Tue Apr 19 15:18:02 2016 +0300

    AGESA boards: Split dispatcher to romstage and ramstage
    
    The way dispatcher table is set up prevents linker from
    optimizing unused code away, we currently have raminit in ramstage.
    
    Optimize this manually by configuring AGESA_ENTRY booleans for
    romstage and ramstage separately. This will remove references in
    FuncParamsInfo and DispatchTable -arrays.
    
    All boards now include multi-core dispatcher, it has minimal footprint:
      AGESA_ENTRY_LATE_RUN_AP_TASK
    
    ACPI S3 support depends on HAVE_ACPI_RESUME being enabled:
      AGESA_ENTRY_INIT_RESUME
      AGESA_ENTRY_INIT_LATE_RESTORE
      AGESA_ENTRY_INIT_S3SAVE
    
    Disabled for all boards as it was not used:
      AGESA_ENTRY_INIT_GENERAL_SERVICES
    
    Change-Id: I7ec36a5819a8e526cbeb87b04dce4227a1689285
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
    Reviewed-on: https://review.coreboot.org/14417
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth <martinroth at google.com>


See https://review.coreboot.org/14417 for details.

-gerrit