[coreboot-gerrit] New patch to review for coreboot: [DonotUpstream]soc/intel/apollolake: Reserve P2SB BAR

[Lijian Zhao (lijian.zhao@intel.com)]

Lijian Zhao (lijian.zhao at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15088

-gerrit

commit c05ae734d409d3d63c9c961a9b57c7c603243867
Author: Zhao, Lijian <lijian.zhao at intel.com>
Date:   Fri Apr 29 20:06:32 2016 -0700

    [DonotUpstream]soc/intel/apollolake: Reserve P2SB BAR
    
    Save P2SB BAR as reserved mmio resource as part of northbridge.
    
    Change-Id: Id0431bed7a3dfe50be3f32b2ffcaf641f43fef62
    Signed-off-by: Zhao, Lijian <lijian.zhao at intel.com>
    Reviewed-on: https://chromium.devtools.intel.com/7235
    Reviewed-by: Petrov, Andrey <andrey.petrov at intel.com>
    Reviewed-on: https://chromium.devtools.intel.com/7577
    Tested-by: Petrov, Andrey <andrey.petrov at intel.com>
---
 src/soc/intel/apollolake/chip.c              | 10 +++++++++-
 src/soc/intel/apollolake/include/soc/iomap.h |  1 +
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index d7c61c1..84628a3 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -41,8 +41,16 @@ static void pci_domain_set_resources(device_t dev)
        assign_resources(dev->link_list);
 }
 
+static void soc_domain_read_resources(device_t dev)
+{
+	int index = 0;
+	pci_domain_read_resources(dev);
+       /*P2SB */
+	mmio_resource(dev, index, P2SB_BAR / KiB, P2SB_SIZE / KiB);
+}
+
 static struct device_operations pci_domain_ops = {
-	.read_resources = pci_domain_read_resources,
+	.read_resources = soc_domain_read_resources,
 	.set_resources = pci_domain_set_resources,
 	.enable_resources = NULL,
 	.init = NULL,
diff --git a/src/soc/intel/apollolake/include/soc/iomap.h b/src/soc/intel/apollolake/include/soc/iomap.h
index e676ba5..7e17f5f 100644
--- a/src/soc/intel/apollolake/include/soc/iomap.h
+++ b/src/soc/intel/apollolake/include/soc/iomap.h
@@ -19,6 +19,7 @@
 #define _SOC_APOLLOLAKE_IOMAP_H_
 
 #define P2SB_BAR			CONFIG_IOSF_BASE_ADDRESS
+#define P2SB_SIZE			0x1000000 /* Fixed 16 MB according to EDS */
 #define MCH_BASE_ADDR			0xfed10000
 #define MCH_BASE_SIZE			(32 * KiB)