[coreboot-gerrit] New patch to review for coreboot: vendorcode/intel/fsp1_1/checklist: romstage - Add car_stage_entry

[Leroy P Leahy (leroy.p.leahy@intel.com)]

Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15129

-gerrit

commit 6bcfa0285f91e14c436c9e183462f98de8cbbdc2
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Wed Jun 8 13:19:05 2016 -0700

    vendorcode/intel/fsp1_1/checklist: romstage - Add car_stage_entry
    
    Add car_stage_entry as an optional routine in the checklist.
    
    TEST=Build and run on Galileo Gen2
    
    Change-Id: I52f6aefc2566beac01373dbebf3a43d35032a0df
    Signed-off-by: Lee Leahy <Leroy.P.Leahy at intel.com>
---
 src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat | 1 +
 src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat | 1 +
 2 files changed, 2 insertions(+)

diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat
index e6bef6c..267673a 100644
--- a/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat
+++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat
@@ -1,6 +1,7 @@
 arch_segment_loaded
 backup_top_of_ram
 boot_device_init
+car_stage_entry
 cbfs_master_header_locator
 cbmem_fail_resume
 clear_recovery_mode_switch
diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat
index 2634566..70f204d 100644
--- a/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat
+++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat
@@ -1,6 +1,7 @@
 arch_segment_loaded
 backup_top_of_ram
 boot_device_init
+car_stage_entry
 cbmem_fail_resume
 clear_recovery_mode_switch
 cpu_smi_handler