[coreboot-gerrit] Patch set updated for coreboot: src/arch/x86/include: Support FSP 1.1

[Lee Leahy (lpleahyjr@gmail.com)]

Lee Leahy (lpleahyjr at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15136

-gerrit

commit cde5c18a0bd66ec93e71c5aae81dca6c761dfb9b
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Wed Jun 8 13:32:51 2016 -0700

    src/arch/x86/include: Support FSP 1.1
    
    Move the weak symbol car_stage_entry to a separate module which gets
    included with a Kconfig value.  This allows replacement with a different
    assembly routine which defines car_stage_entry.
    
    Change car_stage_entry to return the top_of_stack value.
    
    TEST=Build and run on Galileo Gen2 and Amenia
    
    Change-Id: I6b01bbe5da310defc12330e336169167109aeb7d
    Signed-off-by: Lee Leahy <Leroy.P.Leahy at intel.com>
---
 src/arch/x86/Kconfig                |  7 +++++++
 src/arch/x86/assembly_entry.S       | 13 ++++++-------
 src/arch/x86/car_stage_entry.S      | 20 ++++++++++++++++++++
 src/arch/x86/include/arch/cpu.h     |  2 +-
 src/soc/intel/apollolake/romstage.c |  3 ++-
 5 files changed, 36 insertions(+), 9 deletions(-)

diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 9db1e61..7a40bcc 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -209,3 +209,10 @@ config ROMSTAGE_DEBUG_SPINLOOP
 	help
 	  Add a spin (JMP .) in assembly_entry.S during early romstage to wait
 	  for a JTAG debugger to break into the execution sequence.
+
+config ROMSTAGE_AFTER_CAR_STAGE_ENTRY
+	string
+	default "src/arch/x86/car_stage_entry.S"
+	help
+	  Specify the assembly file to be included by assembly_entry.S after
+	  the call to car_stage_entry during romstage.
diff --git a/src/arch/x86/assembly_entry.S b/src/arch/x86/assembly_entry.S
index d1f5d61..5be1c09 100644
--- a/src/arch/x86/assembly_entry.S
+++ b/src/arch/x86/assembly_entry.S
@@ -37,7 +37,6 @@
 .section ".text._start", "ax", @progbits
 .global _start
 _start:
-
 /* _car_stack_end symbol is only valid when bootblock does CAR setup. */
 #if IS_ENABLED(CONFIG_C_ENVIRONMENT_BOOTBLOCK)
 	/* reset stack pointer to CAR stack */
@@ -63,13 +62,13 @@ debug_spinloop:
 	jz	debug_spinloop
 #endif
 
-	jmp	car_stage_entry
+	call	car_stage_entry
 
-/* This is here for linking purposes. */
-.weak car_stage_entry
-car_stage_entry:
-1:
-	jmp	1b
+#if ENV_ROMSTAGE
+#ifdef CONFIG_ROMSTAGE_AFTER_CAR_STAGE_ENTRY
+#include CONFIG_ROMSTAGE_AFTER_CAR_STAGE_ENTRY
+#endif
+#endif
 
 #else
 
diff --git a/src/arch/x86/car_stage_entry.S b/src/arch/x86/car_stage_entry.S
new file mode 100644
index 0000000..f258d52
--- /dev/null
+++ b/src/arch/x86/car_stage_entry.S
@@ -0,0 +1,20 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Google Inc.
+ * Copyright (C) 2016 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+.weak car_stage_entry
+car_stage_entry:
+1:
+	jmp	1b
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 5c26bcf..5a2c572 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -246,7 +246,7 @@ static inline void get_fms(struct cpuinfo_x86 *c, uint32_t tfms)
  * is the symbol jumped to for each stage after bootblock using
  * cache-as-ram.
  */
-void asmlinkage car_stage_entry(void);
+asmlinkage void *car_stage_entry(void);
 
 /*
  * Support setting up a stack frame consisting of MTRR information
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 434d11f..ef15879 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -116,7 +116,7 @@ static void migrate_power_state(int is_recovery)
 }
 ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state);
 
-asmlinkage void car_stage_entry(void)
+asmlinkage void *car_stage_entry(void)
 {
 	void *hob_list_ptr;
 	const void *mrc_data;
@@ -198,6 +198,7 @@ asmlinkage void car_stage_entry(void)
 	postcar_frame_add_mtrr(&pcf, top_of_ram - 16*MiB, 16*MiB, MTRR_TYPE_WRBACK);
 
 	run_postcar_phase(&pcf);
+	return NULL;
 }
 
 static void fill_console_params(struct FSPM_UPD *mupd)