[coreboot-gerrit] Patch set updated for coreboot: soc/intel/apollolake: FSP Header file update for FSP 139_40

[Brandon Breitenstein (brandon.breitenstein@intel.com)]

Brandon Breitenstein (brandon.breitenstein at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15066

-gerrit

commit 601bc5eb54ce2ec33f4776263470886bc9d142cd
Author: Brandon Breitenstein <brandon.breitenstein at intel.com>
Date:   Fri Jun 3 13:59:28 2016 -0700

    soc/intel/apollolake: FSP Header file update for FSP 139_40
    
    FSP 2.0 spec has updated the signatures for the FSPM and FSPS blobs
    with the 139_40 release. In order to successfully pass through
    memory/silicon init the header files must be updated to the latest
    versions
    
    BUG=chrome-os-partner:52784
    BRANCH=none
    TEST=built and booted
    
    Change-Id: Ib60d0d9afa4ee29dff26177826ba59db81b630e8
    Signed-off-by: Brandon Breitenstein <brandon.breitenstein at intel.com>
---
 src/soc/intel/apollolake/include/soc/fsp/FspUpd.h  |  6 +++---
 src/soc/intel/apollolake/include/soc/fsp/FspmUpd.h |  6 +++++-
 src/soc/intel/apollolake/include/soc/fsp/FspsUpd.h | 14 ++++++++++----
 3 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/src/soc/intel/apollolake/include/soc/fsp/FspUpd.h b/src/soc/intel/apollolake/include/soc/fsp/FspUpd.h
index 61d03a2..4d865f5 100644
--- a/src/soc/intel/apollolake/include/soc/fsp/FspUpd.h
+++ b/src/soc/intel/apollolake/include/soc/fsp/FspUpd.h
@@ -33,10 +33,10 @@ are permitted provided that the following conditions are met:
 #ifndef __FSPUPD_H__
 #define __FSPUPD_H__
 
-#define FSPT_UPD_SIGNATURE               0x4450555F54505346        /* 'FSPT_UPD' */
+#define FSPT_UPD_SIGNATURE               0x545F4450554C5041        /* 'APLUPD_T' */
 
-#define FSPM_UPD_SIGNATURE               0x4450555F4D505346        /* 'FSPM_UPD' */
+#define FSPM_UPD_SIGNATURE               0x4D5F4450554C5041        /* 'APLUPD_M' */
 
-#define FSPS_UPD_SIGNATURE               0x4450555F53505346        /* 'FSPS_UPD' */
+#define FSPS_UPD_SIGNATURE               0x535F4450554C5041        /* 'APLUPD_S' */
 
 #endif
diff --git a/src/soc/intel/apollolake/include/soc/fsp/FspmUpd.h b/src/soc/intel/apollolake/include/soc/fsp/FspmUpd.h
index 906f6a4..5f5f367 100644
--- a/src/soc/intel/apollolake/include/soc/fsp/FspmUpd.h
+++ b/src/soc/intel/apollolake/include/soc/fsp/FspmUpd.h
@@ -526,7 +526,11 @@ struct FSP_M_CONFIG {
 
 /** Offset 0x0131
 **/
-  uint8_t                       ReservedFspmUpd[31];
+  void*                       MrcBootDataPtr;
+
+/** Offset 0x0135
+**/
+  uint8_t                       ReservedFspmUpd[27];
 } __attribute__((packed));
 
 /** Fsp M Test Configuration
diff --git a/src/soc/intel/apollolake/include/soc/fsp/FspsUpd.h b/src/soc/intel/apollolake/include/soc/fsp/FspsUpd.h
index 92c2d75..d4ecd36 100644
--- a/src/soc/intel/apollolake/include/soc/fsp/FspsUpd.h
+++ b/src/soc/intel/apollolake/include/soc/fsp/FspsUpd.h
@@ -167,10 +167,10 @@ struct FSP_S_CONFIG {
   uint32_t                      HdaVerbTablePtr;
 
 /** Offset 0x0039 - Enable/Disable P2SB device hidden.
-  Enable/Disable P2SB device hidden. 0:Disable, 1:Enable(Default).
+  Enable/Disable P2SB device hidden. 0:Disable(Default), 1:Enable.
   $EN_DIS
 **/
-  uint8_t                       HideP2sb;
+  uint8_t                       P2sbUnhide;
 
 /** Offset 0x003A - IPU Enable/Disable
   Enable/Disable IPU Device. 0:Disable, 1:Enable(Default).
@@ -1477,9 +1477,15 @@ struct FSP_S_CONFIG {
 **/
   uint8_t                       PcieRpSelectableDeemphasis[6];
 
-/** Offset 0x0326
+/** Offset 0x0326 - Os Selection Mode
+  Select OS mode. 0:Windows(default), 1:Android, 2:Win7
+  $EN_DIS
+**/
+  uint8_t                       OsSelection;
+
+/** Offset 0x0327
 **/
-  uint8_t                       ReservedFspsUpd[10];
+  uint8_t                       ReservedFspsUpd[9];
 } __attribute__((packed));
 
 /** Fsp S Test Configuration