[coreboot-gerrit] New patch to review for coreboot: nb/intel/sandybridge/raminit: Allow 933Mhz on Lenovo devices
Patrick Rudolph (siro@das-labor.org)
gerrit at coreboot.org
Sun Jun 12 09:48:45 CEST 2016
Patrick Rudolph (siro at das-labor.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15158
-gerrit
commit 1a74496605a8d7a1794d6ce8feb805fe07f07fbe
Author: Patrick Rudolph <siro at das-labor.org>
Date: Sat Jun 11 18:39:35 2016 +0200
nb/intel/sandybridge/raminit: Allow 933Mhz on Lenovo devices
Set max_mem_clock_mhz in devicetree to 933Mhz.
Allows to run the memory at up to DDR3-1866.
The same frequency was allowed within the first vendor bios,
but Lenovo than decided to limit it to DDR3-1333.
Tested on Lenovo T520 and DDR3-1600 Dimm.
The RAM is now running at DDR3-1600 instead of DDR3-1333.
This gives about 4% performance increase in glmark2 unsing the
Intel GPU.
Change-Id: If15be497402d84a2778f0434b6381a64eda832d6
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
src/include/device/dram/ddr3.h | 4 ++++
src/mainboard/lenovo/t420/devicetree.cb | 3 +++
src/mainboard/lenovo/t420s/devicetree.cb | 3 +++
src/mainboard/lenovo/t430s/devicetree.cb | 3 +++
src/mainboard/lenovo/t520/devicetree.cb | 3 +++
src/mainboard/lenovo/t530/devicetree.cb | 3 +++
src/mainboard/lenovo/x220/devicetree.cb | 3 +++
src/mainboard/lenovo/x230/devicetree.cb | 3 +++
src/northbridge/intel/sandybridge/raminit.c | 18 +++++++++++++++++-
9 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h
index d58cdce..eae7840 100644
--- a/src/include/device/dram/ddr3.h
+++ b/src/include/device/dram/ddr3.h
@@ -35,9 +35,13 @@
*/
#define TCK_1333MHZ 192
#define TCK_1200MHZ 212
+#define TCK_1100MHZ 232
#define TCK_1066MHZ 240
+#define TCK_1000MHZ 256
#define TCK_933MHZ 274
+#define TCK_900MHZ 284
#define TCK_800MHZ 320
+#define TCK_700MHZ 365
#define TCK_666MHZ 384
#define TCK_533MHZ 480
#define TCK_400MHZ 640
diff --git a/src/mainboard/lenovo/t420/devicetree.cb b/src/mainboard/lenovo/t420/devicetree.cb
index 9f42cbb..a9a124e 100644
--- a/src/mainboard/lenovo/t420/devicetree.cb
+++ b/src/mainboard/lenovo/t420/devicetree.cb
@@ -18,6 +18,9 @@ chip northbridge/intel/sandybridge
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x06100610"
+ # Override fuse bits that hard-code the value to 666 Mhz
+ register "max_mem_clock_mhz" = "933"
+
device cpu_cluster 0 on
chip cpu/intel/socket_rPGA988B
device lapic 0 on end
diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb
index 2376d64..d977681 100644
--- a/src/mainboard/lenovo/t420s/devicetree.cb
+++ b/src/mainboard/lenovo/t420s/devicetree.cb
@@ -17,6 +17,9 @@ chip northbridge/intel/sandybridge
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x06100610"
+ # Override fuse bits that hard-code the value to 666 Mhz
+ register "max_mem_clock_mhz" = "933"
+
device cpu_cluster 0 on
chip cpu/intel/socket_rPGA988B
device lapic 0 on end
diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb
index 8c0f10f..a0182d6 100644
--- a/src/mainboard/lenovo/t430s/devicetree.cb
+++ b/src/mainboard/lenovo/t430s/devicetree.cb
@@ -17,6 +17,9 @@ chip northbridge/intel/sandybridge
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x11551155"
+ # Override fuse bits that hard-code the value to 666 Mhz
+ register "max_mem_clock_mhz" = "933"
+
device cpu_cluster 0 on
chip cpu/intel/socket_rPGA989
device lapic 0 on end
diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb
index 379a95d..b225dcd 100644
--- a/src/mainboard/lenovo/t520/devicetree.cb
+++ b/src/mainboard/lenovo/t520/devicetree.cb
@@ -18,6 +18,9 @@ chip northbridge/intel/sandybridge
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x06100610"
+ # Override fuse bits that hard-code the value to 666 Mhz
+ register "max_mem_clock_mhz" = "933"
+
device cpu_cluster 0 on
chip cpu/intel/socket_rPGA988B
device lapic 0 on end
diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb
index 7db65c7..e8f3622 100644
--- a/src/mainboard/lenovo/t530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/devicetree.cb
@@ -18,6 +18,9 @@ chip northbridge/intel/sandybridge
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x11551155"
+ # Override fuse bits that hard-code the value to 666 Mhz
+ register "max_mem_clock_mhz" = "933"
+
device cpu_cluster 0 on
chip cpu/intel/socket_rPGA989
device lapic 0 on end
diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb
index 6f84acd..f49f837 100644
--- a/src/mainboard/lenovo/x220/devicetree.cb
+++ b/src/mainboard/lenovo/x220/devicetree.cb
@@ -18,6 +18,9 @@ chip northbridge/intel/sandybridge
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x06100610"
+ # Override fuse bits that hard-code the value to 666 Mhz
+ register "max_mem_clock_mhz" = "933"
+
device cpu_cluster 0 on
chip cpu/intel/socket_rPGA989
device lapic 0 on end
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb
index 37d53d4..a871ac5 100644
--- a/src/mainboard/lenovo/x230/devicetree.cb
+++ b/src/mainboard/lenovo/x230/devicetree.cb
@@ -18,6 +18,9 @@ chip northbridge/intel/sandybridge
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x11551155"
+ # Override fuse bits that hard-code the value to 666 Mhz
+ register "max_mem_clock_mhz" = "933"
+
device cpu_cluster 0 on
chip cpu/intel/socket_rPGA989
device lapic 0 on end
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 1ed77eb..528209e 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -4394,8 +4394,24 @@ static unsigned int get_mem_min_tck(void)
}
return DEFAULT_TCK;
} else {
- if (cfg->max_mem_clock_mhz >= 800)
+ if (cfg->max_mem_clock_mhz >= 1333)
+ return TCK_1333MHZ;
+ else if (cfg->max_mem_clock_mhz >= 1200)
+ return TCK_1200MHZ;
+ else if (cfg->max_mem_clock_mhz >= 1100)
+ return TCK_1100MHZ;
+ else if (cfg->max_mem_clock_mhz >= 1066)
+ return TCK_1066MHZ;
+ else if (cfg->max_mem_clock_mhz >= 1000)
+ return TCK_1000MHZ;
+ else if (cfg->max_mem_clock_mhz >= 933)
+ return TCK_933MHZ;
+ else if (cfg->max_mem_clock_mhz >= 900)
+ return TCK_900MHZ;
+ else if (cfg->max_mem_clock_mhz >= 800)
return TCK_800MHZ;
+ else if (cfg->max_mem_clock_mhz >= 700)
+ return TCK_700MHZ;
else if (cfg->max_mem_clock_mhz >= 666)
return TCK_666MHZ;
else if (cfg->max_mem_clock_mhz >= 533)
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