[coreboot-gerrit] New patch to review for coreboot: src/commonlib/lz4_wrapper: Correct inline asm for unaligned 64-bit copy

Benjamin Barenblat (bbaren@google.com) gerrit at coreboot.org
Thu Jun 16 17:50:25 CEST 2016


Benjamin Barenblat (bbaren at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15216

-gerrit

commit 48c37f160aa60d03175b7ea5deb8cb224813976c
Author: Benjamin Barenblat <bbaren at google.com>
Date:   Wed Jun 15 17:12:22 2016 -0700

    src/commonlib/lz4_wrapper: Correct inline asm for unaligned 64-bit copy
    
    Rewrite inline assembly for ARMv7+ to correctly annotate inputs and
    outputs.  This allows GCC’s register allocator to correctly optimize
    the function.
    
    Also modify checkpatch.pl to ignore spaces before opening brackets when
    used in inline assembly.
    
    Change-Id: I255995f5e0a7b1a95375258755a93972c51d79b8
    Signed-off-by: Benjamin Barenblat <bbaren at google.com>
---
 src/commonlib/lz4_wrapper.c | 22 +++++++++++++---------
 util/lint/checkpatch.pl     |  4 +++-
 2 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/src/commonlib/lz4_wrapper.c b/src/commonlib/lz4_wrapper.c
index 93fa7e8..0342868 100644
--- a/src/commonlib/lz4_wrapper.c
+++ b/src/commonlib/lz4_wrapper.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2015 Google Inc.
+ * Copyright 2015-2016 Google Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -54,14 +54,18 @@ static void LZ4_copy8(void *dst, const void *src)
 			((uint8_t *)dst)[i] = ((uint8_t *)src)[i];
 	#else
 		uint32_t x0, x1;
-		__asm__ volatile (
-			"ldr %[x0], [%[src]]\n\t"
-			"ldr %[x1], [%[src], #4]\n\t"
-			"str %[x0], [%[dst]]\n\t"
-			"str %[x1], [%[dst], #4]\n\t"
-			: [x0]"=r"(x0), [x1]"=r"(x1)
-			: [src]"r"(src), [dst]"r"(dst)
-			: "memory" );
+		__asm__ ("ldr %[x0], [%[src]]"
+			: [x0]"=r"(x0)
+			: [src]"r"(src), "m"(*(const uint32_t *)src));
+		__asm__ ("ldr %[x1], [%[src], #4]"
+			: [x1]"=r"(x1)
+			: [src]"r"(src), "m"(*(const uint32_t *)(src + 4)));
+		__asm__ ("str %[x0], [%[dst]]"
+			: "=m"(*(uint32_t *)dst)
+			: [x0]"r"(x0), [dst]"r"(dst));
+		__asm__ ("str %[x1], [%[dst], #4]"
+			: "=m"(*(uint32_t *)(dst + 4))
+			: [x1]"r"(x1), [dst]"r"(dst));
 	#endif
 #elif defined(__riscv__)
 	/* RISC-V implementations may trap on any unaligned access. */
diff --git a/util/lint/checkpatch.pl b/util/lint/checkpatch.pl
index 3a4b8be..4544504 100755
--- a/util/lint/checkpatch.pl
+++ b/util/lint/checkpatch.pl
@@ -3,6 +3,7 @@
 # (c) 2005, Joel Schopp <jschopp at austin.ibm.com> (the ugly bit)
 # (c) 2007,2008, Andy Whitcroft <apw at uk.ibm.com> (new conditions, test suite)
 # (c) 2008-2010 Andy Whitcroft <apw at canonical.com>
+# (c) 2016 Google Inc.
 # Licensed under the terms of the GNU GPL License version 2
 
 use strict;
@@ -3377,11 +3378,12 @@ sub process {
 #  1. with a type on the left -- int [] a;
 #  2. at the beginning of a line for slice initialisers -- [0...10] = 5,
 #  3. inside a curly brace -- = { [0...10] = 5 }
+#  4. in an extended asm instruction -- : [r0]"r"(r0)
 		while ($line =~ /(.*?\s)\[/g) {
 			my ($where, $prefix) = ($-[1], $1);
 			if ($prefix !~ /$Type\s+$/ &&
 			    ($where != 0 || $prefix !~ /^.\s+$/) &&
-			    $prefix !~ /[{,]\s+$/) {
+			    $prefix !~ /[{,:]\s+$/) {
 				if (ERROR("BRACKET_SPACE",
 					  "space prohibited before open square bracket '['\n" . $herecurr) &&
 				    $fix) {



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