[coreboot-gerrit] Patch set updated for coreboot: intel: Fix romstage main() with asmlinkage
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Fri Jun 17 20:59:03 CEST 2016
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15225
-gerrit
commit 722cf9bb0789d9a46225cc1ff5a2938bbe1c54e6
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Fri Jun 17 11:04:37 2016 +0300
intel: Fix romstage main() with asmlinkage
Backport from haswell.
Change-Id: I585639f8af47bd1d8c606789ca026c6d2d0cc785
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/cpu/intel/car/romstage.c | 7 +++++++
src/include/cpu/intel/romstage.h | 5 +++++
2 files changed, 12 insertions(+)
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
new file mode 100644
index 0000000..c6df446
--- /dev/null
+++ b/src/cpu/intel/car/romstage.c
@@ -0,0 +1,7 @@
+#include <cpu/intel/romstage.h>
+
+void * asmlinkage romstage_main(unsigned long bist)
+{
+ mainboard_romstage_entry(bist);
+ return (void*)CONFIG_RAMTOP;
+}
diff --git a/src/include/cpu/intel/romstage.h b/src/include/cpu/intel/romstage.h
index 0ebb912..c294c2e 100644
--- a/src/include/cpu/intel/romstage.h
+++ b/src/include/cpu/intel/romstage.h
@@ -1,7 +1,12 @@
#ifndef _CPU_INTEL_ROMSTAGE_H
#define _CPU_INTEL_ROMSTAGE_H
+#include <arch/cpu.h>
+
/* std signature of entry-point to romstage.c */
void main(unsigned long bist);
+void mainboard_romstage_entry(unsigned long bist);
+void * asmlinkage romstage_main(unsigned long bist);
+
#endif /* _CPU_INTEL_ROMSTAGE_H */
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