[coreboot-gerrit] Patch set updated for coreboot: SPD: fix and add DDR2 SDRAM memory module type

[HAOUAS Elyes (ehaouas@noos.fr)]

HAOUAS Elyes (ehaouas at noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15204

-gerrit

commit 73375618287a206b672ba98276e60f160212710f
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date:   Wed Jun 15 21:13:07 2016 +0200

    SPD: fix and add DDR2 SDRAM memory module type
    
    Fix hex values and add 72b-SO-CDIMM and 72b-SO-RDIMM
    
    Change-Id: I33532e30f45f6c8c0eb6d47b0bea87689d2d9a1a
    Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
 src/include/spd.h      | 20 ++++++++++++--------
 src/include/spd_ddr2.h | 14 ++++++++------
 2 files changed, 20 insertions(+), 14 deletions(-)

diff --git a/src/include/spd.h b/src/include/spd.h
index 62a7494..0ab4d39 100644
--- a/src/include/spd.h
+++ b/src/include/spd.h
@@ -26,7 +26,8 @@
  * Datasheet (alternative):
  *   - Name: SERIAL PRESENCE DETECT STANDARD, General Standard
  *           JEDEC Standard No. 21-C
- *   - PDF: http://www.jedec.org/download/search/4_01_02_00R9.PDF
+ *     Annex J: Serial Presence Detects for DDR2 SDRAM (Revision 1.3):
+ *   - PDF: http://www.jedec.org/download/search/4_01_02_10R17.pdf
  */
 
 #ifndef _SPD_H_
@@ -235,12 +236,15 @@ enum spd_memory_type {
 #define RC62 62
 #define RC63 63
 
-#define SPD_UNDEFINED 0
-#define SPD_RDIMM 1
-#define SPD_UDIMM 2
-#define SPD_SODIMM 3
-#define SPD_MICRO_DIMM 4
-#define SPD_MINI_RDIMM 5
-#define SPD_MINI_UDIMM 6
+/* Byte 20: DIMM type information */
+#define SPD_UNDEFINED 0x00
+#define SPD_RDIMM 0x01
+#define SPD_UDIMM 0x02
+#define SPD_SODIMM 0x04
+#define SPD_72B_SO_CDIMM 0x06
+#define SPD_72B_SO_RDIMM 0x07
+#define SPD_MICRO_DIMM 0x08
+#define SPD_MINI_RDIMM 0x10
+#define SPD_MINI_UDIMM 0x20
 
 #endif
diff --git a/src/include/spd_ddr2.h b/src/include/spd_ddr2.h
index a31b4aa..4e23563 100644
--- a/src/include/spd_ddr2.h
+++ b/src/include/spd_ddr2.h
@@ -20,12 +20,14 @@
 	#define SPD_MEM_TYPE_SDRAM_DDR2	0x08
 
 #define SPD_DIMM_TYPE	20	/* x  bit0 or bit4 =1 mean registered*/
-	#define SPD_DIMM_TYPE_RDIMM	(1<<0)
-	#define SPD_DIMM_TYPE_UDIMM	(1<<1)
-	#define SPD_DIMM_TYPE_SODIMM	(1<<2)
-	#define SPD_DIMM_TYPE_uDIMM	(1<<3)
-	#define SPD_DIMM_TYPE_mRDIMM	(1<<4)
-	#define SPD_DIMM_TYPE_mUDIMM	(1<<5)
+	#define SPD_DIMM_TYPE_RDIMM	0x01
+	#define SPD_DIMM_TYPE_UDIMM	0x02
+	#define SPD_DIMM_TYPE_SODIMM	0x04
+	#define SPD_72B_SO_CDIMM	0x06
+	#define SPD_72B_SO_RDIMM	0x07
+	#define SPD_DIMM_TYPE_uDIMM	0x08
+	#define SPD_DIMM_TYPE_mRDIMM	0x10
+	#define SPD_DIMM_TYPE_mUDIMM	0x20
 
 #define SPD_MOD_ATTRIB	21
 	#define SPD_MOD_ATTRIB_DIFCK	0x20