[coreboot-gerrit] Patch merged into coreboot/master: riscv-spike: Move coreboot to 0x80000000 (2GiB)

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 710566093a504f0fecb641661c5379cad268189b
Author: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Date:   Fri Jun 10 19:35:16 2016 +0200

    riscv-spike: Move coreboot to 0x80000000 (2GiB)
    
    This is where the RAM is (now), on RISC-V.
    
    We need to put coreboot.rom in RAM because Spike (at the moment) only
    supports loading code into the RAM, not into the boot ROM.
    
    Change-Id: I6c9b7cffe5fa414825491ee4ac0d2dad59a2d75c
    Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
    Reviewed-on: https://review.coreboot.org/15149
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/15149 for details.

-gerrit