[coreboot-gerrit] Patch set updated for coreboot: soc/intel/apollolake: Implement global reset handling

[Andrey Petrov (andrey.petrov@intel.com)]

Andrey Petrov (andrey.petrov at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15199

-gerrit

commit afec67fc5f8bb167777c5cdfbb5cfdfc85409900
Author: Andrey Petrov <andrey.petrov at intel.com>
Date:   Tue Jun 14 22:20:28 2016 -0700

    soc/intel/apollolake: Implement global reset handling
    
    Global reset enable bit is not cleared on reset. Therefore, clear
    the bit early. Lock down 0xcf9 so that payload/OS can't issue
    global reset.
    
    BUG=chrome-os-partner:54149
    BRANCH=none
    TEST=none
    
    Change-Id: I3ddf6dd82429b725c818bcd96e163d2ca0acd308
    Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
---
 src/soc/intel/apollolake/chip.c     | 6 ++++++
 src/soc/intel/apollolake/romstage.c | 4 ++++
 2 files changed, 10 insertions(+)

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 94a101f..a19dd3c 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -31,6 +31,7 @@
 #include <soc/intel/common/vbt.h>
 #include <soc/nvs.h>
 #include <soc/pci_devs.h>
+#include <soc/pm.h>
 
 #include "chip.h"
 
@@ -92,6 +93,11 @@ static void soc_final(void *data)
 {
 	if (vbt)
 		rdev_munmap(&vbt_rdev, vbt);
+
+	/* Disable global reset, just in case */
+	global_reset_enable(0);
+	/* Make sure payload/OS can't trigger global reset */
+	global_reset_lock();
 }
 
 void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd)
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 756e275..641eb36 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -36,6 +36,7 @@
 #include <soc/northbridge.h>
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
+#include <soc/reset.h>
 #include <soc/romstage.h>
 #include <soc/uart.h>
 #include <string.h>
@@ -88,6 +89,9 @@ static void soc_early_romstage_init(void)
 	/* Enable decoding for HPET. Needed for FSP global pointer storage */
 	pci_write_config8(P2SB_DEV, P2SB_HPTC, P2SB_HPTC_ADDRESS_SELECT_0 |
 						P2SB_HPTC_ADDRESS_ENABLE);
+
+	/* Disable global reset by default */
+	global_reset_enable(0);
 }
 
 static void disable_watchdog(void)