[coreboot-gerrit] New patch to review for coreboot: intel cache-as-ram: Fix comment about MTRRs

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15282

-gerrit

commit 1c16ac0e0496e6e6970392c65d75c6fa49abdcdc
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Tue Jun 21 06:59:30 2016 +0300

    intel cache-as-ram: Fix comment about MTRRs
    
    Change-Id: I5b9e10fe119c1a046494235e85f730bedfe8578d
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/cpu/intel/car/cache_as_ram.inc       | 4 ++--
 src/cpu/intel/car/cache_as_ram_ht.inc    | 4 ++--
 src/cpu/intel/model_6ex/cache_as_ram.inc | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc
index 349ec05..3d7be8b 100644
--- a/src/cpu/intel/car/cache_as_ram.inc
+++ b/src/cpu/intel/car/cache_as_ram.inc
@@ -321,8 +321,8 @@ lout:
 	call	romstage_main
 
 	/* Save return value from romstage_main. It contains the stack to use
-	 * after cache-as-ram is torn down. It also contains the information
-	 * for setting up MTRRs. */
+	 * after cache-as-ram is torn down.
+	 */
 	movl	%eax, %ebx
 
 	/* We don't need CAR from now on. */
diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc
index f5256ad..1e21d9d 100644
--- a/src/cpu/intel/car/cache_as_ram_ht.inc
+++ b/src/cpu/intel/car/cache_as_ram_ht.inc
@@ -342,8 +342,8 @@ no_msr_11e:
 	call	romstage_main
 
 	/* Save return value from romstage_main. It contains the stack to use
-	 * after cache-as-ram is torn down. It also contains the information
-	 * for setting up MTRRs. */
+	 * after cache-as-ram is torn down.
+	 */
 	movl	%eax, %ebx
 
 	post_code(0x30)
diff --git a/src/cpu/intel/model_6ex/cache_as_ram.inc b/src/cpu/intel/model_6ex/cache_as_ram.inc
index f4c4af8..79383e1 100644
--- a/src/cpu/intel/model_6ex/cache_as_ram.inc
+++ b/src/cpu/intel/model_6ex/cache_as_ram.inc
@@ -135,8 +135,8 @@ clear_mtrrs:
 	call	romstage_main
 
 	/* Save return value from romstage_main. It contains the stack to use
-	 * after cache-as-ram is torn down. It also contains the information
-	 * for setting up MTRRs. */
+	 * after cache-as-ram is torn down.
+	 */
 	movl	%eax, %ebx
 
 	post_code(0x2f)