[coreboot-gerrit] New patch to review for coreboot: arch/riscv: Move _start to the beginning of the bootblock

[Jonathan Neuschäfer (j.neuschaefer@gmx.net)]

Jonathan Neuschäfer (j.neuschaefer at gmx.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15283

-gerrit

commit 9e0de3a22f621de6fa310f45773934ff4dacdb74
Author: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Date:   Tue Jun 21 19:37:03 2016 +0200

    arch/riscv: Move _start to the beginning of the bootblock
    
    The different entry points (0x100, 0x140, ...), which were defined in
    the RISC-V Privileged Specification 1.7, aren't used anymore. Instead
    the Spike bootrom jumps at the start of our image, and traps are handled
    through mtvec.
    
    Change-Id: I865adec5e7a752a25bac93a45654ac06e27d5a8e
    Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
---
 src/arch/riscv/bootblock.S | 15 +--------------
 1 file changed, 1 insertion(+), 14 deletions(-)

diff --git a/src/arch/riscv/bootblock.S b/src/arch/riscv/bootblock.S
index e75e1ca..07d68ab 100644
--- a/src/arch/riscv/bootblock.S
+++ b/src/arch/riscv/bootblock.S
@@ -17,20 +17,7 @@
 #include <arch/encoding.h>
 
 .section ".text._start", "ax", %progbits
-// Maybe there's a better way.
-# machine mode handler when in supervisor mode
-.space 0x140
-supervisor_machine_handler:
-  j supervisor_trap_entry
-
-# handler for when
-.space 0x7c
-.globl machine_handler
-machine_handler:
-#  call trap_handler
-  j trap_entry
-
-.space 0x3c
+
 .globl _start
 _start: