[coreboot-gerrit] New patch to review for coreboot: google/lars: Move devices from mainboard.asl to devicetree
Duncan Laurie (dlaurie@chromium.org)
gerrit at coreboot.org
Wed Jun 22 20:36:50 CEST 2016
Duncan Laurie (dlaurie at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15316
-gerrit
commit 96c7ec109cc196957eda95dfe2567415621e37d0
Author: Duncan Laurie <dlaurie at chromium.org>
Date: Wed Jun 22 11:31:34 2016 -0700
google/lars: Move devices from mainboard.asl to devicetree
Declare the mainboard attached devices in the devicetree and enable
the provided device drivers by default to generate the ACPI objects
for these devices. Then remove the static ACPI objects from the DSDT
in mainboard.asl.
This was tested on a Chell mainboard since I lack a lars device.
Change-Id: Ifba6fc6589ddd54f4c85e8858f17997fbb4b6176
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
---
src/mainboard/google/lars/Kconfig | 12 ++
src/mainboard/google/lars/acpi/mainboard.asl | 202 ---------------------------
src/mainboard/google/lars/devicetree.cb | 58 +++++++-
3 files changed, 65 insertions(+), 207 deletions(-)
diff --git a/src/mainboard/google/lars/Kconfig b/src/mainboard/google/lars/Kconfig
index dc285c0..ee08067 100644
--- a/src/mainboard/google/lars/Kconfig
+++ b/src/mainboard/google/lars/Kconfig
@@ -30,6 +30,18 @@ config CHROMEOS
select VIRTUAL_DEV_SWITCH
select EC_SOFTWARE_SYNC
+config DRIVERS_GENERIC_MAX98357A
+ default y
+
+config DRIVERS_I2C_GENERIC
+ default y
+
+config DRIVERS_I2C_NAU8825
+ default y
+
+config DRIVERS_INTEL_WIFI
+ default y
+
config IRQ_SLOT_COUNT
int
default 18
diff --git a/src/mainboard/google/lars/acpi/mainboard.asl b/src/mainboard/google/lars/acpi/mainboard.asl
index d6299a5..4fe3365 100644
--- a/src/mainboard/google/lars/acpi/mainboard.asl
+++ b/src/mainboard/google/lars/acpi/mainboard.asl
@@ -16,17 +16,6 @@
#include "../gpio.h"
-#define BOARD_TOUCHPAD_I2C_ADDR 0x15
-#define BOARD_TOUCHPAD_IRQ TOUCHPAD_INT_L
-
-#define BOARD_TOUCHSCREEN_I2C_ADDR 0x10
-#define BOARD_TOUCHSCREEN_IRQ TOUCHSCREEN_INT_L
-
-#define BOARD_HP_MIC_CODEC_I2C_ADDR 0x1a
-#define BOARD_HP_MIC_CODEC_IRQ MIC_INT_L
-#define BOARD_LEFT_SPEAKER_AMP_I2C_ADDR 0x34
-#define BOARD_RIGHT_SPEAKER_AMP_I2C_ADDR 0x35
-
Scope (\_SB)
{
Device (LID0)
@@ -44,46 +33,6 @@ Scope (\_SB)
{
Name (_HID, EisaId ("PNP0C0C"))
}
-
- Device (MAXM)
- {
- Name (_HID, "MX98357A")
- Name (_DDN, "Maxim Integrated 98357A Amplifier")
- Name (_UID, 1)
- Name (_CRS, ResourceTemplate()
- {
- GpioIo (Exclusive, PullDefault, 0x0000, 0x0000,
- IoRestrictionNone,
- "\\_SB.PCI0.GPIO", 0x00, ResourceConsumer,,)
- {
- GPIO_SPEAKER_MAXIM_AMP_SDMODE,
- }
- })
- Name (_DSD, Package ()
- {
- ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
- Package ()
- {
- Package () {
- /*
- * Create a named GPIO
- * "sdmode-gpio" for the
- * kernel codec driver
- * to use.
- */
-
- "sdmode-gpio", Package () {
- ^MAXM, 0, 0, 0
- }
- },
- }
- })
-
- Method (_STA)
- {
- Return (0xF)
- }
- }
}
/*
@@ -93,154 +42,3 @@ Scope (\_SB.PCI0.LPCB)
{
#include <drivers/pc80/tpm/acpi/tpm.asl>
}
-
-/*
- * WLAN connected to Root Port 1
- */
-Scope (\_SB.PCI0.RP01)
-{
- Device (WLAN)
- {
- Name (_ADR, 0x00000000)
- Name (_DDN, "Wireless LAN")
- Name (_PRW, Package () { GPE_WLAN_WAKE, 3 })
-
- #include <drivers/intel/wifi/acpi/wrdd.asl>
- }
-}
-
-Scope (\_SB.PCI0.I2C0)
-{
- /* Touchscreen */
- Device (ELTS)
- {
- Name (_HID, "ELAN0001")
- Name (_DDN, "Elan Touchscreen")
- Name (_UID, 1)
- Name (_S0W, 4)
-
- Name (_CRS, ResourceTemplate ()
- {
- I2cSerialBus (
- BOARD_TOUCHSCREEN_I2C_ADDR,
- ControllerInitiated,
- 400000,
- AddressingMode7Bit,
- "\\_SB.PCI0.I2C0",
- )
- Interrupt (ResourceConsumer, Edge, ActiveLow)
- {
- BOARD_TOUCHSCREEN_IRQ
- }
- })
-
- Method (_STA)
- {
- Return (0xF)
- }
- }
-}
-
-Scope (\_SB.PCI0.I2C1)
-{
- /* Touchpad */
- Device (ELTP)
- {
- Name (_HID, "ELAN0000")
- Name (_DDN, "Elan Touchpad")
- Name (_UID, 1)
- Name (_S0W, 4)
-
- Name (_CRS, ResourceTemplate ()
- {
- I2cSerialBus (
- BOARD_TOUCHPAD_I2C_ADDR,
- ControllerInitiated,
- 400000,
- AddressingMode7Bit,
- "\\_SB.PCI0.I2C1",
- )
- Interrupt (ResourceConsumer, Edge, ActiveLow)
- {
- BOARD_TOUCHPAD_IRQ
- }
- })
-
- Name (_PRW, Package() { GPE_TOUCHPAD_WAKE, 0x3 })
-
- Method (_STA)
- {
- Return (0xF)
- }
- }
-}
-
-Scope (\_SB.PCI0.I2C4)
-{
- /* Headphone Codec */
- Device (HPMC)
- {
- Name (_HID, "10508825")
- Name (_DDN, "NAU88L25 Codec")
- Name (_UID, 1)
- Name (_S0W, 4)
- Name (_DSD, Package () {
- ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
- Package () {
- /* Enable jack detection via JKDET pin */
- Package () { "nuvoton,jkdet-enable", 1 },
- /*
- * JKDET pin is pulled up by R389 on board.
- * JKDET pin polarity = active low
- */
- Package () { "nuvoton,jkdet-pull-enable", 1 },
- Package () { "nuvoton,jkdet-pull-up", 1 },
- Package () { "nuvoton,jkdet-polarity", 1 },
- /* VDDA(1.8) * 1.53 = 2.754 */
- Package () { "nuvoton,micbias-voltage", 6 },
- /* VREF Impedance = 125 kOhm */
- Package () { "nuvoton,vref-impedance", 2 },
- /*
- * Setup 4 buttons impedance according to
- * Android specification
- */
- Package () { "nuvoton,sar-threshold-num", 4 },
- Package () { "nuvoton,sar-threshold",
- Package() { 0x0a, 0x14, 0x26, 0x73 } },
- /*
- * Coeff 0-15 used to adjust threshold level
- * 0 for low resist range
- */
- Package () { "nuvoton,sar-hysteresis", 0 },
- /* SAR tracking gain based on 2.754 micbias-voltage */
- Package () { "nuvoton,sar-voltage", 6 },
- /* 100ms short key press debounce */
- Package () { "nuvoton,short-key-debounce", 3 },
- /* 2^(7+2) = 512 ms insert/eject debounce */
- Package () { "nuvoton,jack-insert-debounce", 7 },
- /* debounce not needed for eject normally */
- Package () { "nuvoton,jack-eject-debounce", 0 },
- }
- })
-
- Name (_CRS, ResourceTemplate()
- {
- I2cSerialBus (
- BOARD_HP_MIC_CODEC_I2C_ADDR,
- ControllerInitiated,
- 400000,
- AddressingMode7Bit,
- "\\_SB.PCI0.I2C4",
- )
- Interrupt (ResourceConsumer, Level, ActiveLow)
- {
- BOARD_HP_MIC_CODEC_IRQ
- }
- })
-
- Method (_STA)
- {
- Return (0xF)
- }
- }
-}
diff --git a/src/mainboard/google/lars/devicetree.cb b/src/mainboard/google/lars/devicetree.cb
index fce0495..8ecacdd 100644
--- a/src/mainboard/google/lars/devicetree.cb
+++ b/src/mainboard/google/lars/devicetree.cb
@@ -182,8 +182,23 @@ chip soc/intel/skylake
device pci 14.0 on end # USB xHCI
device pci 14.1 off end # USB xDCI (OTG)
device pci 14.2 on end # Thermal Subsystem
- device pci 15.0 on end # I2C #0
- device pci 15.1 on end # I2C #1
+ device pci 15.0 on
+ chip drivers/i2c/generic
+ register "hid" = ""ELAN0001""
+ register "desc" = ""ELAN Touchscreen""
+ register "irq" = "IRQ_EDGE_LOW(GPP_E7_IRQ)"
+ device i2c 10 on end
+ end
+ end # I2C #0
+ device pci 15.1 on
+ chip drivers/i2c/generic
+ register "hid" = ""ELAN0000""
+ register "desc" = ""ELAN Touchpad""
+ register "irq" = "IRQ_EDGE_LOW(GPP_B3_IRQ)"
+ register "wake" = "GPE0_DW0_05"
+ device i2c 15 on end
+ end
+ end # I2C #1
device pci 15.2 off end # I2C #2
device pci 15.3 off end # I2C #3
device pci 16.0 on end # Management Engine Interface 1
@@ -194,8 +209,36 @@ chip soc/intel/skylake
device pci 17.0 off end # SATA
device pci 19.0 on end # UART #2
device pci 19.1 off end # I2C #5
- device pci 19.2 on end # I2C #4
- device pci 1c.0 on end # PCI Express Port 1
+ device pci 19.2 on
+ chip drivers/i2c/nau8825
+ register "irq" = "IRQ_LEVEL_LOW(GPP_F10_IRQ)"
+ register "jkdet_enable" = "1"
+ register "jkdet_pull_enable" = "1"
+ register "jkdet_pull_up" = "1"
+ register "jkdet_polarity" = "1" # ActiveLow
+ register "vref_impedance" = "2" # 125kOhm
+ register "micbias_voltage" = "6" # 2.754
+ register "sar_threshold_num" = "4"
+ register "sar_threshold[0]" = "0x0a"
+ register "sar_threshold[1]" = "0x14"
+ register "sar_threshold[2]" = "0x26"
+ register "sar_threshold[3]" = "0x73"
+ register "sar_hysteresis" = "0"
+ register "sar_voltage" = "6"
+ register "sar_compare_time" = "0" # 500ns
+ register "sar_sampling_time" = "0" # 2us
+ register "short_key_debounce" = "3" # 30ms
+ register "jack_insert_debounce" = "7" # 512ms
+ register "jack_eject_debounce" = "0"
+ device i2c 1a on end
+ end
+ end # I2C #4
+ device pci 1c.0 on
+ chip drivers/intel/wifi
+ register "wake" = "GPE0_DW0_16"
+ device pci 00.0 on end
+ end
+ end # PCI Express Port 1
device pci 1c.1 off end # PCI Express Port 2
device pci 1c.2 off end # PCI Express Port 3
device pci 1c.3 off end # PCI Express Port 4
@@ -224,7 +267,12 @@ chip soc/intel/skylake
end # LPC Interface
device pci 1f.1 on end # P2SB
device pci 1f.2 on end # Power Management Controller
- device pci 1f.3 on end # Intel HDA
+ device pci 1f.3 on
+ chip drivers/generic/max98357a
+ register "sdmode_gpio" = "ACPI_GPIO_OUTPUT(GPP_B2)"
+ device generic 0 on end
+ end
+ end # Intel HDA
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI
device pci 1f.6 off end # GbE
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