[coreboot-gerrit] Patch set updated for coreboot: mainboard/intel/amenia: Use common NHLT

[Saurabh Satija (saurabh.satija@intel.com)]

Saurabh Satija (saurabh.satija at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15024

-gerrit

commit 6ea99ff4a44a6344d2e975f681d29206681b6314
Author: Saurabh Satija <saurabh.satija at intel.com>
Date:   Thu May 26 16:08:45 2016 -0700

    mainboard/intel/amenia: Use common NHLT
    
    Add ACPI NHLT table generation that the current hardware
    supports.
    
    Amenia has support for audio codecs, Nuvoton for headsets and
    Maxim for speakers.
    
    Change-Id: Iaba9ec81ffb4f128f2e4413dec5174d9ecb856c9
    Signed-off-by: Saurabh Satija <saurabh.satija at intel.com>
---
 src/mainboard/intel/amenia/dsdt.asl    | 11 ++--
 src/mainboard/intel/amenia/mainboard.c | 92 ++++++++++++++++++++++++++++++++++
 2 files changed, 98 insertions(+), 5 deletions(-)

diff --git a/src/mainboard/intel/amenia/dsdt.asl b/src/mainboard/intel/amenia/dsdt.asl
index 4a64f87..46404ed 100644
--- a/src/mainboard/intel/amenia/dsdt.asl
+++ b/src/mainboard/intel/amenia/dsdt.asl
@@ -1,7 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2015 Intel Corp.
+ * Copyright (C) 2016 Intel Corp.
  * (Written by Lance Zhao <lijian.zhao at intel.com> for Intel Corp.)
  *
  * This program is free software; you can redistribute it and/or modify
@@ -33,15 +33,16 @@ DefinitionBlock(
 	Scope (\_SB) {
 		Device (PCI0)
 		{
-                #include <soc/intel/apollolake/acpi/northbridge.asl>
-                #include <soc/intel/apollolake/acpi/southbridge.asl>
+			#include <soc/intel/apollolake/acpi/northbridge.asl>
+			#include <soc/intel/apollolake/acpi/southbridge.asl>
+			#include <soc/intel/apollolake/acpi/pch_hda.asl>
 		}
 	}
 	/* Mainboard Specific devices */
 	#include "acpi/mainboard.asl"
 
-        /* Chipset specific sleep states */
-        #include <soc/intel/apollolake/acpi/sleepstates.asl>
+	/* Chipset specific sleep states */
+	#include <soc/intel/apollolake/acpi/sleepstates.asl>
 
 	#include "acpi/superio.asl"
 }
diff --git a/src/mainboard/intel/amenia/mainboard.c b/src/mainboard/intel/amenia/mainboard.c
index 22304f8..befacfe 100644
--- a/src/mainboard/intel/amenia/mainboard.c
+++ b/src/mainboard/intel/amenia/mainboard.c
@@ -16,8 +16,14 @@
  */
 
 #include <device/device.h>
+#include <drivers/intel/audio/audio.h>
+#include <arch/acpi.h>
+#include <console/console.h>
 #include <soc/gpio.h>
+#include <soc/nhlt_ids.h>
 #include <soc/pci_devs.h>
+#include <stdlib.h>
+#include <string.h>
 #include "ec.h"
 
 /* TODO: Move GPIO config to its own file once we get more GPIOs in the list */
@@ -129,7 +135,44 @@ static const struct pad_config amenia_gpios[] = {
 	PAD_CFG_NF(GPIO_199, UP_20K, DEEP, NF2),	/* HV_DDI1_HPD */
 	PAD_CFG_NF(GPIO_200, UP_20K, DEEP, NF2),	/* HV_DDI0_HPD */
 	PAD_CFG_NF(PMC_SPI_FS1, NATIVE, DEEP, NF2),	/* HV_DDI2_HPD */
+};
+
+static const struct nhlt_format_config dmic_2ch_cfg[] = {
+	/* 48 KHz 16-bits per sample. */
+	{
+		.num_channels = 2,
+		.sample_freq_khz = 48,
+		.container_bits_per_sample = 16,
+		.valid_bits_per_sample = 16,
+		.settings_file = "dmic-2ch-48khz-16b.bin",
+	},
+};
 
+static const struct nhlt_format_config headset_cfg[] = {
+	/* 48 KHz 24-bits per sample. */
+	{
+		.num_channels = 2,
+		.sample_freq_khz = 48,
+		.container_bits_per_sample = 32,
+		.valid_bits_per_sample = 24,
+		.settings_file = "headset.bin",
+        },
+};
+
+static struct nhlt_tdm_config headset_tdm_cfg = {
+		.virtual_slot = 0,
+		.config_type = NHLT_TDM_BASIC,
+};
+
+static const struct nhlt_format_config speaker_cfg[] = {
+	/* 48 KHz 24-bits per sample. */
+	{
+		.num_channels = 2,
+		.sample_freq_khz = 48,
+		.container_bits_per_sample = 32,
+		.valid_bits_per_sample = 24,
+		.settings_file = "speaker-render.bin",
+	},
 };
 
 static void mainboard_init(void *chip_info)
@@ -138,6 +181,55 @@ static void mainboard_init(void *chip_info)
 	mainboard_ec_init();
 }
 
+static unsigned long mainboard_write_acpi_tables(
+        device_t device, unsigned long current, acpi_rsdp_t *rsdp)
+{
+	uintptr_t start_addr;
+	uintptr_t end_addr;
+	struct nhlt *nhlt;
+
+	start_addr = current;
+
+	nhlt = nhlt_init();
+
+	if (nhlt == NULL)
+		return start_addr;
+
+	/* 2 Channel DMIC array. */
+	if (nhlt_soc_add_dmic_array(nhlt, 2, dmic_2ch_cfg,
+	  ARRAY_SIZE(dmic_2ch_cfg)))
+		printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n");
+
+	/* Dialog for Headset codec.
+	 * Headset codec is bi-directional but uses the same configuration
+	 * settings for render and capture endpoints.
+	 */
+	if (nhlt_soc_add_codec_on_ssp(nhlt, AUDIO_LINK_SSP1, AUDIO_BIDIR,
+	  headset_cfg, ARRAY_SIZE(headset_cfg), headset_cfg,
+				  ARRAY_SIZE(headset_cfg), &headset_tdm_cfg))
+		printk(BIOS_ERR, "Couldn't add headset codec.\n");
+
+	/* MAXIM Smart Amps for left and right speakers. This is Render only,
+	 * capture cfg can be NULL.
+	 */
+	if (nhlt_soc_add_codec_on_ssp(nhlt, AUDIO_LINK_SSP5, AUDIO_RENDER,
+	  speaker_cfg, ARRAY_SIZE(speaker_cfg), NULL, 0, NULL))
+		printk(BIOS_ERR, "Couldn't add speaker codec.\n");
+
+	end_addr = nhlt_soc_serialize(nhlt, start_addr);
+
+	if (end_addr != start_addr)
+		acpi_add_table(rsdp, (void *)start_addr);
+
+	return end_addr;
+}
+
+static void mainboard_enable(device_t dev)
+{
+	dev->ops->write_acpi_tables = (void *) mainboard_write_acpi_tables;
+}
+
 struct chip_operations mainboard_ops = {
 	.init = mainboard_init,
+	.enable_dev = mainboard_enable,
 };