[coreboot-gerrit] Patch merged into coreboot/master: rockchip/rk3399: Clean up voltage rail settings

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 50df52244ebeb019c9e4f78a1197d7200f759b51
Author: Lin Huang <hl at rock-chips.com>
Date:   Wed Jun 15 17:43:40 2016 +0800

    rockchip/rk3399: Clean up voltage rail settings
    
    The CENTER LOGIC should always be 0.9V and can not be adjusted,
    so use duty_ns = 2860 to correct CENTER LOGIC to 0.9V. And now
    DDR seems to run stable at 800MHz on the gru board.
    
    BRANCH=none
    BUG=chrome-os-partner:54144, chrome-os-partner:53208
    TEST=run "stressapptest -M 1024 -s 1000" and pass
    
    Change-Id: Ia900e248c10ddd0ab630446a324cc0446c0fa49b
    Signed-off-by: Martin Roth <martinroth at chromium.org>
    Original-Commit-Id: f4fb1cefb59ac4099cef8b32a68ed9222e708478
    Original-Change-Id: I2238da6c17908d09bc284b321d796901317ed9ef
    Original-Signed-off-by: Lin Huang <hl at rock-chips.com>
    Original-Signed-off-by: Douglas Anderson <dianders at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/352772
    Reviewed-on: https://review.coreboot.org/15297
    Tested-by: build bot (Jenkins)
    Reviewed-by: Furquan Shaikh <furquan at google.com>


See https://review.coreboot.org/15297 for details.

-gerrit