[coreboot-gerrit] Patch set updated for coreboot: gru: Add get_developer_mode_switch()

[Martin Roth (martinroth@google.com)]

Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15305

-gerrit

commit 0e93d1907fdbdda4f8939250624b31cef1d704fc
Author: Simon Glass <sjg at chromium.org>
Date:   Sun Jun 19 16:06:40 2016 -0600

    gru: Add get_developer_mode_switch()
    
    Add this function and make it return 0, as there is no physical dev switch
    (at least I think this is what we are supposed to do).
    
    This is needed for elog to work, which is needed so we can test RTC
    properly.
    
    BUG=chrome-os-partner:52220
    BRANCH=none
    TEST=boot on gru with CONFIG_ELOG_DEBUG enabled and see elog messages:
    elog_init()
    SF: Detected W25Q64 with sector size 0x1000, total 0x800000
    elog_find_flash()
    FMAP: area RW_ELOG found @ 5d8000 (32768 bytes)
    elog_scan_flash()
    elog_is_buffer_clear(base=0x000000000031d668 size=4096)
    ELOG: flash area invalid
    elog_flash_erase(address=0x000000000031d668 offset=0x005d8000 size=4096)
    SF: Successfully erased 4096 bytes @ 0x5d8000
    elog_prepare_empty()
    elog_flash_write(address=0x000000000031d668 offset=0x005d8000 size=8)
    elog_scan_flash()
    elog_is_buffer_clear(base=0x000000000031d668 size=4096)
    elog_is_header_valid()
    elog_update_event_buffer_state()
    elog_is_buffer_clear(base=0x000000000031d670 size=4088)
    elog_is_area_valid()
    ELOG: FLASH @0x000000000031d668 [SPI 0x005d8000]
    ELOG: area is 4096 bytes, full threshold 3834, shrink size 1024
    elog_add_event_raw(type=16)
    out: cmd=0x44: 03 b9 44 00 00 00 00 00
    in-header: 03 3f 00 00 04 00 00 00
    in-data: 6e 4c 00 00
    elog_flash_write(address=0x000000000031d670 offset=0x005d8008 size=11)
    ELOG: Event(16) added with size 11
    elog_add_event_raw(type=17)
    out: cmd=0x44: 03 b9 44 00 00 00 00 00
    in-header: 03 3f 00 00 04 00 00 00
    in-data: 6e 4c 00 00
    elog_flash_write(address=0x000000000031d67b offset=0x005d8013 size=13)
    ELOG: Event(17) added with size 13
    elog_add_event_raw(type=A0)
    out: cmd=0x44: 03 b9 44 00 00 00 00 00
    in-header: 03 3f 00 00 04 00 00 00
    in-data: 6e 4c 00 00
    elog_flash_write(address=0x000000000031d688 offset=0x005d8020 size=9)
    ELOG: Event(A0) added with size 9
    elog_add_boot_reason: Logged dev mode boot
    
    I can't actually see the timestamp, but the EC traffic is visible.
    
    Change-Id: I82bcf296dce4f4d146edf90b23bfae955fbe9e3a
    Signed-off-by: Martin Roth <martinroth at chromium.org>
    Original-Commit-Id: ffc7a7e0e7b136144d2a0b2ed21a543eafee49fa
    Original-Change-Id: I1489c6b874cc49495635aec0bf303f7098455716
    Original-Signed-off-by: Simon Glass <sjg at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/353821
    Original-Commit-Ready: Vadim Bendebury <vbendeb at chromium.org>
    Original-Tested-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-by: Duncan Laurie <dlaurie at google.com>
    Original-Reviewed-by: Vadim Bendebury <vbendeb at chromium.org>
---
 src/mainboard/google/gru/chromeos.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/mainboard/google/gru/chromeos.c b/src/mainboard/google/gru/chromeos.c
index 4265f8d..912d13c 100644
--- a/src/mainboard/google/gru/chromeos.c
+++ b/src/mainboard/google/gru/chromeos.c
@@ -33,6 +33,11 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
 
+int get_developer_mode_switch(void)
+{
+	return 0;
+}
+
 int get_recovery_mode_switch(void)
 {
 	return 0;