[coreboot-gerrit] New patch to review for coreboot: intel post-car: Separate romstage ramstack (WIP)

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15468

-gerrit

commit cce68820dd9278de8a225b658621910c8b649b9a
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Mon Jun 27 13:24:11 2016 +0300

    intel post-car: Separate romstage ramstack (WIP)
    
    TODO: Need to fix MTRRs before placing stack high.
    
    Change-Id: I221e207bcd0031048876f29100a1770a444d435b
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/cpu/intel/car/romstage.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index c6df446..4892750 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -1,7 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+ 
 #include <cpu/intel/romstage.h>
+#include <program_loading.h>
 
 void * asmlinkage romstage_main(unsigned long bist)
 {
 	mainboard_romstage_entry(bist);
-	return (void*)CONFIG_RAMTOP;
+	return (void*)romstage_ram_stack();
 }