[coreboot-gerrit] Patch set updated for coreboot: google/reef: Update gpio config for audio

[HARSHAPRIYA N (harshapriya.n@intel.com)]

HARSHAPRIYA N (harshapriya.n at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15433

-gerrit

commit e54db15cb332b0c419e31eda85c84e2e538de08e
Author: Sathyanarayana Nujella <sathyanarayana.nujella at intel.com>
Date:   Thu Jun 16 14:34:30 2016 -0700

    google/reef: Update gpio config for audio
    
    This changelist updates gpio config for speaker SDMODE pin and headset interrupt.
    1. Disables speaker by default and audio kernel is expected to enable this when audio rendering starts.
    2. Headset codec (Dialog) is level LOW triggered interrupt. Updating the gpio as "INVERT" to get
    level LOW interrupt configuration.
    
    Change-Id: Id33ad29e637bf1fe6b02e8a4b0fd9e220e8983e7
    Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella at intel.com>
---
 src/mainboard/google/reef/gpio.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/google/reef/gpio.h b/src/mainboard/google/reef/gpio.h
index 23628eb..eeaf806 100644
--- a/src/mainboard/google/reef/gpio.h
+++ b/src/mainboard/google/reef/gpio.h
@@ -211,7 +211,7 @@ static const struct pad_config gpio_table[] = {
 	/* I2S1 -- largely unused */
 	PAD_CFG_GPI(GPIO_74, UP_20K, DEEP),	 /* I2S1_MCLK */
 	PAD_CFG_GPI(GPIO_75, UP_20K, DEEP),	 /* I2S1_BCLK -- PCH_WP */
-	PAD_CFG_GPI(GPIO_76, UP_20K, DEEP),	 /* I2S1_WS_SYNC */
+	PAD_CFG_GPO(GPIO_76, 0, DEEP),	/* I2S1_WS_SYNC -- SPK_PA_EN */
 	PAD_CFG_GPI(GPIO_77, UP_20K, DEEP),	 /* I2S1_SDI */
 	PAD_CFG_GPI(GPIO_78, UP_20K, DEEP),	 /* I2S1_SDO */
 
@@ -256,7 +256,7 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_GPI(GPIO_112, UP_20K, DEEP),	 /* SIO_SPI_1_FS0 */
 	PAD_CFG_GPI(GPIO_113, UP_20K, DEEP),	 /* SIO_SPI_1_FS1 */
 	/* Headset interrupt */
-	PAD_CFG_GPI_APIC(GPIO_116, NONE, DEEP, LEVEL, NONE), /* SIO_SPI_1_RXD */
+	PAD_CFG_GPI_APIC(GPIO_116, NONE, DEEP, LEVEL, INVERT),	/* SIO_SPI_1_RXD */
 	PAD_CFG_GPI(GPIO_117, UP_20K, DEEP),	 /* SIO_SPI_1_TXD */
 
 	/* SIO_SPI_2 -- unused */